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LM5141RGET

Low Iq, Wide Input Range Synchronous Buck Controller

Packaging

Package | PIN: RGE | 24
Temp: Q (-40 to 125)
Carrier: Cut Tape
Qty Price
1-9 $4.63
10-24 $4.17
25-99 $3.88
100-249 $3.40
250-499 $3.19
500-749 $2.71
750-999 $2.29
1000+ $2.19

Features

  • –40ºC to +125ºC Ambient Operating Temperature Range
  • An AEC-Q100 Qualified Device is Available
  • VIN 3.8 V to 65 V (70 V Absolute Maximum)
  • Output: Fixed 3.3 V, 5 V, or Adjustable From
    1.5 V - 15 V with ±0.8% Accuracy
  • Fixed 2.2 MHz or 440 kHz Switching Frequency with ±5% Accuracy
  • High-Side and Low-Side Gate Drive With Slew Rate Control
  • Optional Frequency Shift by Varying an Analog Voltage or RT Resistor
  • Optional Synchronization to an External Clock
  • Optional Spread Spectrum
  • Shutdown Mode IQ: 10 µA Typical
  • Low Standby Mode IQ: 35 µA Typical
  • 75 mV Current Limit Threshold with ±0.9% Accuracy
  • External Resistor or DCR Current Sensing
  • Output Enable Logic Input
  • Hiccup Mode for Sustained Overload
  • Power Good Indication Output
  • Selectable Diode Emulation or Forced Pulse Width Modulation
  • QFN-24 Package with Wettable Flanks
  • Create a Custom Design Using the LM5141 With the WEBENCH® Power Designer

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Texas Instruments  LM5141RGET

The LM5141 is a synchronous buck controller, intended for high voltage wideVIN step-down converter applications. The control method is peak currentmode control. Current mode control provides inherent line feed-forward, cycle-by-cycle currentlimiting, and ease of loop compensation. The LM5141 features slew rate control to simplify thecompliance with EMI requirements.

The LM5141 has two selectable switching frequencies: 2.2 MHz and 440 kHz. Gate Driverswith Slew Rate Control that can be adjusted to reduce EMI.

In light or no-load conditions, the LM5141 operates in skip cycle mode for improved lowpower efficiency. The LM5141 has a high voltage bias regulator with automatic switch-over to anexternal bias to reduce the IQ current from VIN.Additional features include frequency synchronization, cycle-by-cycle current limit, hiccup modefault protection for sustained overload, and power good output.