LMK61E2-SIAT

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LMK61E2-SIAT

Ultra-Low Jitter Fully Programmable Oscillator, Integrated EEPROM, +/-50ppm

Packaging

Package | PIN: SIA | 8
Temp: I (-40 to 85)
Carrier: Cut Tape
Qty Price
1-9 $19.54
10-24 $18.16
25-99 $17.53
100-249 $15.31
250-499 $14.57
500-749 $13.41
750-999 $12.04
1000+ $12.00

Features

  • Ultra-Low Noise, High Performance
    • Jitter: 90 fs RMS Typical fOUT > 100 MHz
    • PSRR: –70 dBc, Robust Supply Noise Immunity
  • Flexible Output Format; User Selectable
    • LVPECL up to 1 GHz
    • LVDS up to 900 MHz
    • HCSL up to 400 MHz
  • Total Frequency Tolerance of ±50 ppm
  • System Level Features
    • Frequency Margining: Fine and Coarse
    • Internal EEPROM: User Configurable Default Settings
  • Other Features
    • Device Control: I2C
    • 3.3-V Operating Voltage
    • Industrial Temperature Range (–40ºC to +85ºC)
    • 7-mm × 5-mm 8-Pin Package
    • Create a Custom Design Using the LMK61E2 With the WEBENCH® Power Designer

Texas Instruments  LMK61E2-SIAT

The LMK61E2 device is an ultra-low jitter PLLatinum programmable oscillator with a fractional-N frequency synthesizer with integrated VCO that generates commonly used reference clocks. The outputs can be configured as LVPECL, LVDS, or HCSL.

The device features self start-up from on-chip EEPROM that is factory programmed to generate 156.25-MHz LVPECL output. The device registers and EEPROM settings are fully programmable in-system through I2C serial interface. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3-V ± 5% supply.

The device provides fine and coarse frequency margining options through I2C serial interface to support system design verification tests (DVT), such as standard compliance and system timing margin testing.