SN65LVDS180PW

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SN65LVDS180PW

Single Full-Duplex LVDS Transceiver

Packaging

Package | PIN: PW | 14
Temp: I (-40 to 85)
Carrier: Partial Tube
Qty Price
1-9 $4.01
10-24 $3.61
25-99 $3.36
100-249 $2.95
250-499 $2.76
500-749 $2.35
750-999 $1.98
1000+ $1.89

Features

  • Meets or Exceeds the Requirements of ANSI
    TIA/EIA-644-1995 Standard
  • Full-Duplex Signaling Rates up to 150 Mbps
  • Bus-Pin ESD Exceeds 12 kV
  • Operates From a Single 3.3-V Supply
  • Low-Voltage Differential Signaling With Typical
    Output Voltages of 350 mV and a 100-Ω Load
  • Propagation Delay Times
    • Driver: 1.7 ns Typical
    • Receiver: 3.7 ns Typical
  • Power Dissipation at 200 MHz
    • Driver: 25 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5-V Tolerant
  • Receiver Maintains High Input Impedance With
    VCC < 1.5 V
  • Receiver Has Open-Circuit Fail Safe

Texas Instruments  SN65LVDS180PW

The SN65LVDS179, SN65LVDS180, SN65LVDS050, and SN65LVDS051 devices are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 400 Mbps. The TIA/EIA-644 standard-compliant electrical interface provides a minimum differential output voltage magnitude of 247 mV into a 100-Ω load and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.

These devices offer various driver, receiver, and enabling combinations in industry-standard footprints. Because these devices are intended for use in simplex or distributed simplex bus structures, the driver enable function does not put the differential outputs into a high-impedance state but rather disconnects the input and reduces the quiescent power used by the device. For these functions with a high-impedance driver output, see the SN65LVDM series of devices. All devices are characterized for operation from –40°C to 85°C.