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16-Bit Bus Termination Networks With Bus Hold Function


Package | PIN: DW | 20
Temp: I (-40 to 85)
Carrier: Cut Tape
Qty Price
1-9 $2.87
10-24 $2.58
25-99 $2.41
100-249 $2.11
250-499 $1.98
500-749 $1.68
750-999 $1.42
1000+ $1.35


  • Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems
  • 4.5-V to 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Reduces Undershoot and Overshoot Caused By Line Reflections
  • Repetitive Peak Forward Current ...IFRM = 100 mA
  • Inputs Are TTL-Voltage Compatible
  • Low Power Consumption (Like CMOS)
  • Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Texas Instruments  SN74ACT1073DWR

This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1073 prevents bus lines from floating without using pullup or pulldown resistors.

The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state.