|Package | PIN:||D | 14|
|Temp:||I (-40 to 85)|
- Operates From 1.65 V to 3.6 V
- Max tpd of 3.1 ns at 3.3 V
- ±24-mA Output Drive at 3.3 V
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Texas Instruments SN74ALVC126DR
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVC126 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.