SN74AUC1G04DRLR

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SN74AUC1G04DRLR

Single Inverter Gate

Packaging

Package | PIN: DRL | 5
Temp: I (-40 to 85)
Carrier: Cut Tape
Qty Price
1-9 $0.28
10-24 $0.25
25-99 $0.22
100-249 $0.19
250-499 $0.17
500-749 $0.13
750-999 $0.10
1000+ $0.09

Features

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in the Texas Instruments NanoFree™ Package
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial Power Down Mode and Back Drive Protection
  • Sub-1-V Operable
  • Max tpd of 2.2 ns at 1.8 V
  • Low Power Consumption, 10-µA Maximum ICC
  • ±8-mA Output Drive at 1.8 V

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Texas Instruments  SN74AUC1G04DRLR

This single inverter gate is operational at 0.8-V to 2.7-V VCC,but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC1G04 performs the Boolean function Y = A.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using thedie as the package.

This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the ouput,preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, seeApplications of Texas Instruments AUCSub-1-V Little Logic Devices, SCEA027.