SN74AUC1G126DBVR

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SN74AUC1G126DBVR

Single Bus Buffer Gate With 3-State Output

Packaging

Package | PIN: DBV | 5
Temp: I (-40 to 85)
Carrier: Cut Tape
Qty Price
1-9 $0.22
10-24 $0.19
25-99 $0.17
100-249 $0.15
250-499 $0.13
500-749 $0.10
750-999 $0.08
1000+ $0.07

Features

  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Available in TI’s NanoFree™ Package
  • Optimized for 1.8-V Operation and is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial Power Down Mode and Back Drive Protection
  • Sub-1 V Operable
  • Maximum tpd of 2.5 ns at 1.8 V
  • Low Power Consumption, 10-µA Maximum ICC
  • ±8-mA Output Drive at 1.8 V

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Texas Instruments  SN74AUC1G126DBVR

The SN74AUC1G126 bus buffer gate is operational at 0.8-V to 2.7-VVCC, but is designed specifically for 1.65-V to 1.95-VVCC operation.

The SN74AUC1G126 device is a single line driver with a tri-state output. The output isdisabled when the output-enable (OE) input is low.

To ensure the high-impedance state during power up or power down, OE should be tied toGND through a pulldown resistor; the minimum value of the resistor is determined by thecurrent-sourcing capability of the driver.

NanoFree™ package technology is a major breakthrough in device packaging concepts, usingthe die as the package.

This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs, whichprevents damaging current backflow through the device when it is powered down.