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Octal Bus Transceivers And Registers With 3-State Outputs


Package | PIN: DW | 24
Temp: I (-40 to 85)
Carrier: Partial Tube
Qty Price
1-9 $1.50
10-24 $1.34
25-99 $1.24
100-249 $1.06
250-499 $0.98
500-749 $0.80
750-999 $0.64
1000+ $0.57


  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 11 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Independent Registers for A and B Buses
  • Multiplexed Real-Time and Stored Data
  • True Data Paths

Texas Instruments  SN74HC646DW

The ’HC646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’HC646 devices.

Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either or both registers.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE\ is active (low). In the isolation mode (OE\ high), A data may be stored in one register and/or B data may be stored in the other register.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

When an output function is disabled, the input function is still enabled and can be used to store data. Only one of the two buses, A or B, may be driven at a time.