SN74LS165ADR

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SN74LS165ADR

Serial-out shift registers

Packaging

Package | PIN: D | 16
Temp: C (0 to 70)
Carrier: Cut Tape
Qty Price
1-9 $0.69
10-24 $0.61
25-99 $0.55
100-249 $0.47
250-499 $0.42
500-749 $0.33
750-999 $0.25
1000+ $0.22

Features

  • Complementary Outputs
  • Direct Overriding Load (Data) Inputs
  • Gated Clock Inputs
  • Parallel-to-Serial Data Conversion

The SN54165 and SN74165 devices are obsolete and are no longer supplied.

Texas Instruments  SN74LS165ADR

The ’165 and ’LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual, direct data inputs that are enabled by a low level at the shift/load (SH/LD\) input. These registers also feature gated clock (CLK) inputs and complementary outputs from the eighth bit. All inputs are diode-clamped to minimize transmission-line effects, thereby simplifying system design.

Clocking is accomplished through a two-input positive-NOR gate, permitting one input to be used as a clock-inhibit function. Holding either of the clock inputs high inhibits clocking, and holding either clock input low with SH/LD\ high enables the other clock input. Clock inhibit (CLK INH) should be changed to the high level only while CLK is high. Parallel loading is inhibited as long as SH/LD\ is high. Data at the parallel inputs are loaded directly into the register while SH/LD\ is low, independently of the levels of CLK, CLK INH, or serial (SER) inputs.