|Package | PIN:||DBV | 5|
|Temp:||Q (-40 to 125)|
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- Available in Texas Instruments
NanoStar™ and NanoFree™ Packages
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Max tpd of 5.3 ns at 3.3 V
- Low Power Consumption, 10-µA Maximum ICC
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode Operation
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Texas Instruments SN74LVC1G132DBVR
The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputsdesigned for 1.65-V to 5.5-V VCC operation and performs the Boolean functionY = A × B or Y = A + B inpositive logic.
Because of Schmitt action, this device has different input threshold levels forpositive-going (VT+) and negative-going (VT–)signals.
This device can be triggered from the slowest of input ramps and still give cleanjitter-free output signals.
This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packagingconcepts, using the die as the package.