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Single 3-Input Positive OR-AND Gate


Package | PIN: YZP | 6
Temp: I (-40 to 85)
Carrier: Cut Tape
Qty Price
1-9 $0.44
10-24 $0.39
25-99 $0.36
100-249 $0.30
250-499 $0.27
500-749 $0.21
750-999 $0.16
1000+ $0.14


  • Available in the Texas Instruments NanoStar and NanoFree Packages
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 5 ns at 3.3 V
  • Low Power Consumption, 10-µA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typ @ 3.3 V)
  • Can Be Used in Three Combinations:
    • OR-AND Gate
    • OR Gate
    • AND Gate
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per
    JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Texas Instruments  SN74LVC1G3208YZPR

This device is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G3208 device is a single 3-input positive OR-AND gate. It performs the Boolean function Y = (A + B) ● C in positive logic.

By tying one input to GND or VCC, the SN74LVC1G3208 device offers two more functions. When C is tied to VCC, this device performs as a 2-input OR gate (Y = A + B). When A is tied to GND, the device works as a 2-input AND gate (Y = B ● C). This device also works as a 2-input AND gate when B is tied to GND (Y = A ● C).

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.