|Package | PIN:||DCK | 5|
|Temp:||Q (-40 to 125)|
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- ±4000-V Human-Body Model (HBM) ESD Classification Level 3A
- ±1000-V Charged-Device Model (CDM) ESD Classification Level C5
- Supports 5-V VCC Operation
- Inputs Accept Voltages to 5.5 V
- Supports Down Translation to VCC
- Low Power Consumption, 15-µA Maximum ICC
- Maximum tpd of 6 ns at 3.3 V and 50-pF load
- ±24-mA Output Drive at 3.3 V
- Ioff Supports Partial-Power-Down Mode, and Back-Drive Protection
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
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Texas Instruments SN74LVC1G86QDCKTQ1
The SN74LVC1G86-Q1 is an automotive qualified device that performs theBoolean function Y = AB + AB in positive logic. Thissingle 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V VCCoperation.
If the input is low, the other input is reproduced in true form at theoutput. If the input is high, the signal on the other input is reproduced inverted at the output.This device has low power consumption with maximum tpd of 6 ns at 3.3 V and50-pF capacitive load. The max output drive is ±32-mA at 4.5 V and ±24-mA at 3.3 V.
This device is fully specified for partial-power-down applications usingIoff. The Ioff circuitry disables the outputs,preventing damaging current back flow through the device when it is powered down.