|Package | PIN:||DGK | 8|
|Temp:||I (-40 to 85)|
- Two-Channel Bidirectional Buffer
- I2C Bus and SMBus Compatible
- Operating Supply Voltage Range of 0.9 V to 5.5 V on A-side
- Operating Supply Voltage Range of 2.7 V to 5.5 V on B-side
- Voltage-Level Translation From 0.9 V - 5.5 V to 2.7 V - 5.5 V
- Footprint and Functional Replacement for PCA9515B
- Active-High Repeater-Enable Input
- Open-Drain I2C I/O
- 5.5-V Tolerant I2C and Enable Input Support Mixed-Mode Signal Operation
- Accommodates Standard Mode and Fast Mode I2C Devices and Multiple Masters
- High-Impedance I2C Pins When Powered-Off
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
- 5500 V Human-Body Model (A114-A)
- 200 V Machine Model (A115-A)
- 1000 V Charged-Device Model (C101)
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Texas Instruments TCA9517ADGKR
The TCA9517A is abidirectional buffer with level shifting capabilities for I2C and SMBussystems. It provides bidirectional voltage-level translation (up-translation/down-translation)between low voltages (down to 0.9 V) and higher voltages (2.7 V to 5.5 V) in mixed-modeapplications. This device enables I2C and SMBus systems to be extendedwithout degradation of performance, even during level shifting.
The TCA9517A buffersboth the serial data (SDA) and the serial clock (SCL) signals on the I2Cbus, thus allowing two buses of up to 400-pF bus capacitance to be connected in anI2C application.
The TCA9517A has twotypes of drivers: A-side drivers and B-side drivers. All inputs and I/Os are over-voltage tolerantto 5.5 V, even when the device is unpowered (VCCB and/orVCCA = 0 V).
The TCA9517A offers a higher contention level threshold,VILC, than the TCA9517, which allows connections to slaves which have weakerpulldown ability.
The type of buffer design on the B-sideprevents it from being used in series with devices which use static voltage offset. This is becausethese devices do not recognize buffered low signals as a valid low and do not propagate it as abuffered low again.
The B-side drivers operate from 2.7 V to 5.5 V. The output low level for this internalbuffer is approximately 0.5 V, but the input voltage must be 70 mV or more below the output lowlevel when the output internally is driven low. The higher-voltage low signal is called a bufferedlow. When the B-side I/O is driven low internally, the low is not recognized as a low by the input.This feature prevents a lockup condition from occurring when the input low condition is released.
The A-side drivers operate from 0.9 V to 5.5 V and drive more current. They do notrequire the buffered low feature (or the static offset voltage). This means that a low signal onthe B-side translates to a nearly 0 V low on the A-side, which accommodates smaller voltage swingsof lower-voltage logic. The output pulldown on the A-side drives a hard low, and the input level isset at 0.3 × VCCA to accommodate the need for a lower low level in systemswhere the low-voltage-side supply voltage is as low as 0.9 V.
The A-side of two or more TCA9517As can be connected together, allowing many topographies (SeeFigure 8 andFigure 9 ), with the A-side as the common bus.Also, the A-side can be connected directly to any other buffer with static- or dynamic-offsetvoltage. Multiple TCA9517As canbe connected in series, A-side to B-side, with no buildup in offset voltage and with onlytime-of-flight delays to consider. The TCA9517A cannot be connected B-side to B-side, because of the buffered lowvoltage from the B-side. The B-side cannot be connected to a device with rise time accelerators.
VCCA is only used to provide the 0.3 × VCCA reference to theA-side input comparators and for the power-good-detect circuit. The TCA9517A logic and all I/Os arepowered by the VCCB pin.
As with the standard I2C system, pullup resistors are requiredto provide the logic-high levels on the buffered bus. The TCA9517A has standard open-drain configuration of theI2C bus. The size of these pullup resistors depends on the system, buteach side of the repeater must have a pullup resistor. The device is designed to work with Standardmode and Fast mode I2C devices in addition to SMBus devices. Standardmode I2C devices only specify 3 mA in a genericI2C system, where Standard mode devices and multiple masters arepossible. Under certain conditions, higher termination currents can be used.