|Package | PIN:||PZP | 100|
|Temp:||I (-40 to 85)|
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 3: –40°C to 85°C Ambient OperatingTemperature Range
- Device HBM ESD Classification LevelH2
- Device CDM ESD Classification Level C3B
- Supports Pixel Rates Up to 165 MHz (Including 1080p and WUXGA at 60 Hz)
- Digital Visual Interface (DVI) Specification Compliant(1)
- True-Color, 24-Bit/Pixel, 16.7M Colors at 1 or 2 Pixels per Clock
- Laser-Trimmed Internal Termination Resistors for Optimum Fixed Impedance Matching
- Skew Tolerant Up to One Pixel-Clock Cycle
- 4× Oversampling
- Reduced Power Consumption – 1.8-V Core Operation With 3.3-V I/Os and Supplies(2)
- Reduced Ground Bounce Using Time-Staggered Pixel Outputs
- Low Noise and Good Power Dissipation Using TI PowerPAD™ Packaging
- Advanced Technology Using TI 0.18-µm EPIC-5™ CMOS Process
- TFP401A-Q1 Incorporates HSYNC Jitter Immunity(3) (1) (2) (3)
(1)The TFP401A-Q1 device incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.
(2)The TFP401A-Q1 device has an internal voltage regulator that provides the 1.8-V core power supply from the external 3.3-V supplies.
(3)The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TFP401A-Q1 is compliant with the DVI Specification Rev. 1.0.
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Texas Instruments TFP401AIPZPRQ1
The Texas Instruments TFP401A-Q1 device is a TI Panelbus™ flat-panel display product, and is part of acomprehensive family of end-to-end DVI 1.0-compliant solutions. Targeted primarily at desktop LCDmonitors and digital projectors, the TFP401A-Q1 device finds applications in any design requiringhigh-speed digital interface.
The TFP401A-Q1 device supports display resolutions up to 1080p and WUXGA in 24-bittrue-color pixel format. It also offers design flexibility to drive one or two pixels per clock,supports TFT or DSTN panels, and provides an option for time-staggered pixel outputs for reducedground bounce.
PowerPAD advanced packaging technology results in best-of-class power dissipation,footprint, and ultralow ground inductance.
The TFP401A-Q1 combines Panelbus circuit innovation with TIs advanced 0.18-µm EPIC-5™CMOS process technology, along with TI PowerPAD package technology to achieve a reliable,low-powered, low-noise, high-speed digital interface solution.