TLC2555IDGK

text.skipToContent text.skipToNavigation

TLC2555IDGK

12-Bit, 400 kSPS ADC, Serial Out, TMS320 Compatible (up to 10MHz), Single Ch. Pseudo-differential

Packaging

Package | PIN: DGK | 8
Temp: I (-40 to 85)
Carrier: Partial Tube
Qty Price
1-9 $9.40
10-24 $8.74
25-99 $8.44
100-249 $7.37
250-499 $7.01
500-749 $6.45
750-999 $5.79
1000+ $5.78

Features

  • Maximum Throughput . . . 175/360 KSPS
  • INL/DNL: ±1 LSB Max, SINAD: 72 dB, SFDR: 85 dB, fi = 20 kHz
  • SPI/DSP-Compatible Serial Interface
  • Single 5-V Supply
  • Rail-to-Rail Analog Input With 500 kHz BW
  • Three Options Available:
    • TLC2551: Single Channel Input
    • TLC2552: Dual Channels With Autosweep
    • TLC2555: Single Channel With Pseudo-Differential Input
  • Low Power With Autopower Down
    • Operating Current: 3.5 mA
      Autopower Down: 8 µA
  • Small 8-Pin MSOP and SOIC Packages

TMS320 is a trademark of Texas Instruments.

Texas Instruments  TLC2555IDGK

The TLC2551, TLC2552, and TLC2555 are a family of high performance, 12-bit, low-power, miniature, CMOS analog-to-digital converters (ADC). The TLC255x family uses a 5-V supply. Devices are available with single, dual, or single pseudo-differential inputs. Each device has a chip select (CS)\, serial clock (SCLK), and serial data output (SDO) that provides a direct 3-wire interface to the serial port of most popular host microprocessors (SPI interface). When interfaced with a TMS320™ DSP, a frame sync signal (FS) can be used to indicate the start of a serial data frame on CS\ for all devices or on FS for the TLC2551.

The TLC2551, TLC2552, and TLC2555 are designed to operate with very low power consumption. The power saving feature is further enhanced with an autopower down mode. This product family features a high-speed serial link to modern host processors with SCLK up to 20 MHz. The maximum SCLK frequency is dependent upon the mode of operation (see Table 1). The TLC255x family uses the SCLK as the conversion clock, which provides synchronous operation and a minimum conversion time of 1.5 µs using a 20 MHz SCLK.