|Package | PIN:||DRC | 10|
|Temp:||Q (-40 to 125)|
- Qualified for Automotive Applications
- AEC-Q100 Test Guidance With the Following Results:
- Device Temperature Grade 1:–40°C to 125°C Ambient Operating Temperature
- Device HBM ESD ClassificationLevel 2
- Device CDM ESD Classification LevelC4B
- Input Voltage: Supports 2.5-V Rail and 3.3-V Rail
- VLDOIN Voltage Range: 1.1 V to 3.5 V
- Sink/Source Termination Regulator Includes Droop Compensation
- Requires Minimum Output Capacitance of 20-µF (typically 3 × 10-µF MLCCs) for Memory Termination Applications (DDR)
- PGOOD to Monitor Output Regulation
- EN Input
- REFIN Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
- Remote Sensing (VOSNS)
- ±10-mA Buffered Reference (REFOUT)
- Built-in Soft Start, UVLO and OCL
- Thermal Shutdown
- Meets DDR, DDR2 JEDEC Specifications; Supports DDR3, DDR3L, Low-Power DDR3 and DDR4 VTT Applications
- VSON-10 Package With Exposed Thermal Pad
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Texas Instruments TPS51200QDRCRQ1
The TPS51200-Q1 device is a sink and source double-data-rate (DDR)termination regulator specifically designed for low input voltage, low-cost, low-noise systemswhere space is a key consideration.
The TPS51200-Q1 device maintains a fast transient response and onlyrequires a minimum output capacitance of 20 µF. The TPS51200-Q1 device supports a remote sensing function and all powerrequirements for DDR, DDR2, DDR3, DDR3L, Low Power DDR3 and DDR4 VTT bus termination.
In addition, the TPS51200-Q1 device provides an open-drain PGOOD signal to monitor theoutput regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) forDDR applications.
The TPS51200-Q1 device is available in the thermally-efficient VSON-10package, and is rated both green and Pb-free. The device is specified from –40°C to125°C.