|Package | PIN:||DSQ | 10|
|Temp:||I (-40 to 85)|
- Supply Input Voltage: Supports 3.3-V Rail and 5-V Rail
- VLDOIN Input Voltage Range: VTT+0.4 V to 3.5 V
- VTT Termination Regulator
- OutputVoltage Range: 0.5 V to 0.9 V
- 2-A Peak Sink and SourceCurrent
- Requires Only 10-µF MLCC Output Capacitor
- ±20 mVAccuracy
- VTTREF Buffered Reference
- VDDQ/2 ± 1% Accuracy
- 10-mA Sink and SourceCurrent
- Supports High-Z in S3 and Soft-Stop in S4 and S5 with S3 and S5 Inputs
- Overtemperature Protection
- 10-Pin, 2 mm × 2 mm SON (DSQ) Package
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Texas Instruments TPS51206DSQR
The TPS51206 device is a sink and source double date rate (DDR)termination regulator with VTTREF buffered reference output. It is specifically designed forlow-input voltage, low-cost, low-external component count systems where space is a keyconsideration. The device maintains fast transient response and only requires 1 × 10-µF of ceramicoutput capacitance. The device supports a remote sensing function and all power requirements forDDR2, DDR3 and Low-Power DDR3 (DDR3L), and DDR4 VTT bus. The VTT current capability is ±2-A peak.The device supports all of the DDR power states, putting VTT to High-Z in S3 state (suspend to RAM)and discharging VTT and VTTREF in S4 or S5 state (suspend to disk).
The TPS51206 device is available in 10-Pin, 2 mm × 2mm SON (DSQ) PowerPAD™ package and specified from –40°C to 105°C.