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TPS7A8701RTJR

Dual 500mA Low-Noise (3.8μVRMS) LDO Voltage Regulator

Packaging

Package | PIN: RTJ | 20
Temp: Q (-40 to 125)
Carrier: Cut Tape
Qty Price
1-9 $2.13
10-24 $1.91
25-99 $1.77
100-249 $1.54
250-499 $1.43
500-749 $1.20
750-999 $0.98
1000+ $0.90

Features

  • Two Independent LDO Channels
  • Low Output Noise: 3.8 µVRMS (10 Hz–100 kHz)
  • Low Dropout: 100 mVMAX at 0.5 A
  • Wide Input Voltage Range: 1.4 V to 6.5 V
  • Wide Output Voltage Range: 0.8 V to 5.2 V
  • High Power-Supply Ripple Rejection:
    • 75 dB at DC
    • 40 dB at 100 kHz
    • 40 dB at 1 MHz
  • 1.0% Accuracy Over Line, Load, and Temperature
  • Excellent Load Transient Response
  • Adjustable Start-Up In-Rush Control
  • Selectable Soft-Start Charging Current
  • Independent Open-Drain Power-Good (PGx) Outputs
  • Stable with a 10 µF or Larger Ceramic Output Capacitor
  • 4-mm × 4-mm, 20-Pin WQFN Package

Texas Instruments  TPS7A8701RTJR

The TPS7A87 is a dual, low-noise (3.8 µVRMS), low-dropout (LDO) voltage regulator capable of sourcing 500 mA per channel with only 100 mV of maximum dropout.

The TPS7A87 provides the flexibility of two independent LDOs and approximately 30% smaller solution size than two single-channel LDOs. Each output is adjustable with external resistors from 0.8 V to 5.2 V. The wide input-voltage range of the TPS7A87 supports operation as low as 1.4 V and up to 6.5 V.

With 1% output voltage accuracy (over line, load, and temperature) and soft-start capabilities to reduce in-rush current, the TPS7A87 is ideal for powering sensitive analog low-voltage devices [such as voltage-controlled oscillators (VCOs), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), complementary metal oxide semiconductor (CMOS) sensors, and video application-specific integrated circuits (ASICs)].

The TPS7A87 is designed to power noise-sensitive components such as those found in instrumentation, medical, video, professional audio, test and measurement, and high-speed communication applications. The very low 3.8-µVRMS output noise and wideband PSRR (40 dB at 1 MHz) minimizes phase noise and clock jitter. These features maximize the performance of clocking devices, ADCs, and DACs.