|Package | PIN:||VF | 32|
|Temp:||C (0 to 70)|
- Fully Compliant With the USB Specification as a Full-Speed Hub: TID #30220231
- 32-Pin LQFP (1) Package With a 0.8-mm Terminal Pitch or QFN Package With a 0.5-mm Pin Pitch
- 3.3-V Low-Power ASIC Logic
- Integrated USB Transceivers
- State Machine Implementation Requires No Firmware Programming
- One Upstream Port and Four Downstream Ports
- All Downstream Ports Support Full-Speed and Low-Speed Operations
- Two Power Source Modes
- Self-Powered Mode
- Bus-Powered Mode
- Power Switching and Overcurrent Reporting Is Provided Ganged or Per Port
- Supports Suspend and Resume Operations
- Supports Programmable Vendor ID and Product ID With External Serial EEPROM
- 3-State EEPROM Interface Allows EEPROM Sharing
- Push-Pull Outputs for PWRON Eliminate the Need for External Pullup Resistors
- Noise Filtering on OVRCUR Provides Immunity to Voltage Spikes
- Package Pinout Allows 2-Layer PCB
- Low EMI Emission Achieved by a 6-MHz Crystal Input
- Migrated From Proven TUSB2040 Hub
- Lower Cost Than the TUSB2040 Hub
- Enhanced System ESD Performance
- No Special Driver Requirements; Works Seamlessly With Any Operating System With USB Stack Support
- Supports 6-MHz Operation Through a Crystal Input or a 48-MHz Input Clock
(1)JEDEC descriptor S-PQFP-G for low-profile quad flatpack (LQFP).
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Texas Instruments TUSB2046BVFR
The TUSB2046x is a 3.3-V CMOS hub device that provides one upstream port and fourdownstream ports in compliance with the Universal Serial Bus (USB) specification as a full-speedhub. Because this device is implemented with a digital state machine instead of a microcontroller,no firmware
programming is required. Fully compliant USB transceivers are integrated into the ASIC forall upstream and downstream ports. The downstream ports support full-speed and low-speed devices byautomatically setting the slew rate according to the speed of the device attached to the ports. Theconfiguration of the BUSPWR pin selects either the bus-powered or the self-powered mode.
Configuring the GANGED input determines the power switching and overcurrent detectionmodes for the downstream ports. If GANGED is high, all PWRON outputs switchtogether and if any OVRCUR is activated, all ports transition to thepower-off state. If GANGED is low, the PWRON outputs andOVRCUR inputs operate on a per-port basis.
The TUSB2046x provides the flexibility of using a 6-MHz or a 48-MHz clock. The logiclevel of the TSTMODE terminal controls the selection of the clock source. When TSTMODE is low, theoutput of the internal APLL circuitry is selected to drive the internal core of the device. WhenTSTMODE is high, the TSTPLL/48MCLK input is selected as the input clock source and the APLLcircuitry is powered down and bypassed. The internal oscillator cell is also powered down whileTSTMODE is high. Low EMI emission is achieved because the TUSB2046x can usee a 6-MHz crystal input.Connect the crystal as shown inFigure 6. An internal PLL thengenerates the 48-MHz clock used to sample data from the upstream port and to synchronize the 12 MHzused for the USB clock. If low-power suspend and resume are desired, a passive crystal or resonatormust be used. However, a 6-MHz oscillator may be used by connecting the output to the XTAL1 pin andleaving the XTAL2 pin open. The oscillator TTL output must not exceed 3.6 V.
For 48-MHz operation, the clock cannot be generated with a crystal using the XTAL2 outputbecause the internal oscillator cell supports only the fundamental frequency. Other useful featuresof the TUSB2046x include a package with a 0.8-mm pin pitch for easy PCB routing and assembly,push-pull outputs for the PWRON pins eliminate the need for pullup resistorsrequired by traditional open-collector I/Os, and OVRCUR pins have noisefiltering for increased immunity to voltage spikes.