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UCC21220DR

4-A, 6-A, 3.0-kVRMS Isolated Dual-Channel Gate Driver

Packaging

Package | PIN: D | 16
Temp: Q (-40 to 125)
Carrier: Cut Tape
Qty Price
1-9 $3.82
10-24 $3.44
25-99 $3.20
100-249 $2.80
250-499 $2.63
500-749 $2.23
750-999 $1.89
1000+ $1.80

Features

  • Narrow Body SOIC-16 (D) Package
  • Universal: Dual Low-Side, Dual High-Side or Half-Bridge Driver
  • Switching Parameters:
    • 28-ns Typical Propagation Delay
    • 10-ns Minimum PulseWidth
    • 5-ns Maximum Delay Matching
    • 5.5-ns MaximumPulse-Width Distortion
  • Integrated Deglitch Filter
  • Common-Mode Transient Immunity (CMTI) Greater than 100-V/ns
  • 1.5-kV Channel-to-Channel Functional Isolation
  • Isolation Barrier Life >40 Years
  • 4-A Peak Source, 6-A Peak Sink Output
  • TTL and CMOS Compatible Inputs
  • 3-V to 5.5-V Input VCCI Range
  • Up to 18-V VDD Output Drive Supply
    • 5-V and 8-V VDD UVLO Options
  • I/Os withstand –2-V for 200 ns
  • Rejects Input Pulses and Noise Transients Shorter than 5-ns
  • UVLO Protection for All Power Supplies
  • Active Pull Down Protection at Outputs
  • Fast Disable for Power Sequencing
  • Operating Temp. Range (TA) –40°C to 125°C
  • Surge Immunity up to 7800-VPK
  • Safety-Related Certifications (Planned):
    • 4242-VPK Isolation per DIN V VDE V 0884-11:2017-01 andDIN EN 61010-1
    • 3000-VRMS Isolation for 1 Minute per UL1577
    • CSA Certification per IEC 60950-1, IEC 62368-1 and IEC 61010-1 EndEquipment Standards
    • CQC Certification perGB4943.1-2011

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Texas Instruments  UCC21220DR

The UCC21220 and UCC21220A devices areisolated dual-channel gate driver with 4-A peak-source and 6-A peak-sink current. It is designed to drive power MOSFET, IGBT, and GaNtransistors with the best-in-class dynamic performance.

The devices can be configured as two low-side drivers, two high-side drivers, orhalf-bridge drivers. Two outputs can be paralleled to form a single driver which doubles the drivestrength for heavy load conditions without internal shoot-through due to the best-in-class delaymatching performance.

The input side is isolated from the two output drivers by a3.0-kVRMS isolation barrier, with a minimum of 100-V/ns common-modetransient immunity (CMTI).

Protection features include: DIS pin shuts down both outputs simultaneously when it isset high; INA/B pin rejects input transient shorter than 5-ns; both inputs and outputs canwithstand –2-V spikes for 200-ns, all supplies have undervoltage lockout (UVLO), and active pulldown protection clamps the output below 2.1-V when unpowered or floated.

With these features, the device enables high efficiency, high power density, androbustness in a wide variety of power applications.