|Package | PIN:||NPL | 13|
|Temp:||Q (-40 to 125)|
- Universal: Dual Low-Side, Dual High-Side or Half-Bridge Driver
- 5 x 5 mm, Space-Saving LGA-13 Package
- Switching Parameters:
- 19-ns Typical Propagation Delay
- 5-ns Maximum DelayMatching
- 6-ns Maximum Pulse-Width Distortion
- CMTI Greater than 100-V/ns
- 4-A Peak Source, 6-A Peak Sink Output
- TTL and CMOS Compatible Inputs
- 3-V to 18-V Input VCCI Range
- Up to 25-V VDD with 5-V UVLO
- Programmable Overlap and Dead Time
- Rejects Input Transients Shorter than 5-ns
- Fast Disable for Power Sequencing
- Safety-Related Certifications:
- 3535-VPK Isolation per DIN V VDE V 0884-11:2017-01
- 2500-VRMSIsolation for 1 Minute per UL 1577
- CQC per GB4943.1-2011(Planned)
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Texas Instruments UCC21225ANPLT
The UCC21225A is an isolated dual-channel gate driver with 4-A source and 6-A sink peakcurrent in a 5-mm x 5-mm LGA-13 package. It is designed to drive power transistors up to 5-MHz withbest-in-class propagation delay and pulse-width distortion.
The input side is isolated from the two output drivers by a2.5-kVRMS isolation barrier, with 100-V/ns minimum common-mode transientimmunity (CMTI). Internal functional isolation between the two secondary side drivers allowsworking voltage up to 700-VDC.
This driver can be configured as two low-side, two high-side, or a half-bridge driverwith programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it isset high, and allows normal operation when left open or grounded.
The device accepts VDD supply voltages up to 25-V. A wide input VCCI range from 3-V to18-V makes the driver suitable for interfacing with both analog and digital controllers. All thesupply voltage pins have under voltage lock-out (UVLO) protection.
With all these advanced features, the UCC21225A enables high power density, highefficiency, and robustness in a wide variety of power applications.