ADC31JB68EVM

ADC31JB68 16-Bit, 500-MSPS Analog-to-Digital Converter Evaluation Module

ADC31JB68EVM

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Overview

The ADC31JB68EVM is an evaluation board used to evaluate the ADC31JB68 analog-to-digital converter (ADC) from Texas Instruments. The ADC31JB68 is a single-channel 16-bit ADC capable of operating at sampling rates up to 500 Mega Samples Per Second (MSPS) with outputs featuring a standard JESD204B high speed serial interface.

The ADC31JB68EVM is designed to work seamlessly with the TSW14J56EVM, Texas Instruments’ JESD204B data capture card and the High Speed Data Converter Pro (HSDCPro) software tool for high speed data converter evaluation. The ADC31JB68EVM is also compatible with many of the development kits from leading FPGA vendors that contain an FMC connector.

Features

  • Transformer-coupled signal input network allowing a single-ended signal source
  • LMK4828 system clock generator that generates the FPGA reference clock for the high speed serial interface
  • Default Transformer-coupled clock input network to test the ADC performance with a very low-noise clock
  • High speed serial data output over a standard FMC connector
  • Device registers programming via USB connector and FTDI USB-to-SPI bus translator

USB cable 5VDC power adapter

High-speed ADCs (>10MSPS)
ADC31JB68 16-Bit, 500-MSPS Analog-to-Digital Converter (ADC)

 

Clock jitter cleaners & synchronizers
LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

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HARDWARE AND SOFTWARE PACKAGE

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Evaluation board

ADC31JB68EVM – ADC31JB68 Evaluation Module

TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
Certificate ADC31JB68EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
User guide ADC31JB68EVM User's Guide (Rev. A) Aug. 01, 2016
User guide ADC31JB68EVM Design Package Aug. 26, 2015

Related design resources

Hardware development

EVALUATION BOARD
TSW14J50EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-6.5Gbps TSW14J56EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-12.5Gbps TSW14J57EVM Data capture/pattern generator: data converter EVM with 16 JESD204B lanes from 1.6-15Gbps
INTERFACE ADAPTER
TSW14J10EVM Data Converter Evaluation Module to FPGA Platform FMC Adapter: 10 JESD204B Lanes up to 12.5Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SW High-speed data converter pro software

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