ADC3660 dual, 16-bit, 0.5-MSPS to 65-MSPS, low-noise, ultra-low-power ADC evaluation module


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The ADC3660 evaluation module (EVM) demonstrates the performance of the ADC3660, which is an ultra-low-power, high-linearity, analog-to-digital converter (ADC). Onboard voltage regulation and flexible analog input options allow easy evaluation for many different applications.

For a complete evaluation system, use the TSW1400EVM data capture card (sold separately) and high-speed data converter pro software (DATACONVERTERPRO-SW). When interfacing to TSW1400EVM via an FPGA mezzanine card (FMC) connector, data capture (up to 512 MB) of the serial CMOS interfaces can be evaluated, including real and complex decimation modes.

  • Serial CMOS interface
  • USB powered with onboard power regulation
  • Pin compatible with ADC364x products
  • THS4541 FDA and Balun-coupled inputs allow for flexible evaluation
  • TSW1400EVM and DATACONVERTERPRO-SW allow for easy data capture
  • FMC connector allows for easy integration with FPGA development platforms

  • ADC3660 evaluation module
  • Mini-USB cable
  • FPGA interposer card
  • Power cables

High-speed ADCs (>10MSPS)
ADC3660 Dual, 16-bit, 0.5-MSPS to 65-MSPS, low-noise, ultra-low-power analog-to-digital converter (ADC)


Clock generators
CDCE6214-Q1 Ultra-low power clock generator supporting PCIe gen 1-5 with 2 inputs, 4 outputs and internal EEPROM


Current/voltage/power monitors
INA226 36V, 16-bit, ultra-precise i2c output current/voltage/power monitor w/alert


Fully differential amplifiers
THS4541 High-Speed Differential I/O Amplifier


Linear & low-dropout (LDO) regulators
TPS7A90 500-mA, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy

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ADC3660EVM – ADC3660 dual, 16-bit, 0.5-MSPS to 65-MSPS, low-noise, ultra-low-power ADC evaluation module

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TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
* User guide ADC3660 Evaluation Module User's Guide Jul. 27, 2020
Application note High-Speed ADC: How to Properly Terminate Single-ended CMOS Digital Outputs Dec. 09, 2020
Data sheet ADC3660 16-Bit, 0.5 to 65-MSPS, Low-Noise, Low Power Dual Channel ADC datasheet (Rev. A) Oct. 26, 2020
Certificate ADC3660EVM EU Declaration of Conformity (DoC) Oct. 09, 2020

Related design resources

Hardware development

TSW1400EVM Data Capture/Pattern Generator: Data Converter Evaluation Module With 8 LVDS Lanes up to 1.5Gbps

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