The ADS4125EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4125 device, an extremely low power 12-bit 125 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible environment to test the ADS4125 under a variety of clock, input and supply conditions.
The ADS4125EVM also includes Texas Instrument’s new 10 Output Low Jitter Clock Synchronizer and Jitter Cleaner device, the CDCE72010, which can be used to drive the clocking input to the ADS4125. Open sockets are provided for an external VCXO and crystal band pass filter allowing for rapid evaluation of a combined high performance ADC and clocking circuit equivalent to a final system level solution. Alternatively an external clock source can be provided to the EVM and either routed through the CDCE72010 or passed directly to the ADS4125 clock input.
The ADS4125EVM is directly compatible to the TSW1405EVM, TI's high speed LVDS output ADC data capture card. It is also compatible with Altera and Xilinx FPGA EVMs which have FMC or HSMC connectors, via the appropriate interposer card.
| Type | Title | Date | |
|---|---|---|---|
| Certificate | ADS4125EVM EU Declaration of Conformity (DoC) | Jan. 02, 2019 | |
| Data sheet | ADS41xx 14-, 12-Bit, 65-, 125-MSPS, Ultra-Low-Power ADC datasheet (Rev. C) | Jun. 08, 2017 | |
| User guide | Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) | Jul. 10, 2012 | |
| User guide | ADS41xx/58B18EVM User's Guide.. (Rev. C) | May 15, 2012 |
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