ADS4125 12-Bit, 125-MSPS Analog-to-Digital Converter Evaluation Module


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The ADS4125EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4125 device, an extremely low power 12-bit 125 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a flexible environment to test the ADS4125 under a variety of clock, input and supply conditions.

The ADS4125EVM also includes Texas Instrument’s new 10 Output Low Jitter Clock Synchronizer and Jitter Cleaner device, the CDCE72010, which can be used to drive the clocking input to the ADS4125. Open sockets are provided for an external VCXO and crystal band pass filter allowing for rapid evaluation of a combined high performance ADC and clocking circuit equivalent to a final system level solution. Alternatively an external clock source can be provided to the EVM and either routed through the CDCE72010 or passed directly to the ADS4125 clock input.

The ADS4125EVM is directly compatible to the TSW1405EVM, TI's high speed LVDS output ADC data capture card. It is also compatible with Altera and Xilinx FPGA EVMs which have FMC or HSMC connectors, via the appropriate interposer card.

  • Transformer coupled analog input path
  • Amplifier path based on the THS4509
  • Configurable CMOS or DDR LVDS parallel output modes
  • Transformer coupled clock input path
  • CDCE72010 Jitter Clock Synchronizer and Jitter Cleaner clocking circuit
  • DDR LVDS output and capture ability via TSW1405EVM capture card
  • USB controlled for SPI access
  • High-speed ADCs (>10MSPS)
    ADS4125 12-Bit, 125-MSPS Analog-to-Digital Converter (ADC)


    Clock generators
    CDCE72010 10 outputs low jitter clock synchronizer and jitter cleaner

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    Evaluation board

    ADS4125EVM – ADS4125 Evaluation Module

    In stock
    Limit: 3
    GUI for evaluation module (EVM)

    ADS41xx SPI GUI rev1.6 (Rev. B) – SLAC384B.ZIP (82933KB)

    Support software

    TIGAR Support Files – SBAC120.ZIP (262219KB)

    TI's Standard Terms and Conditions for Evaluation Items apply.

    Design files

    ADS41xx EVM BOM, Schematic, and PCB SLAR048.ZIP (2222 KB)

    Technical documentation

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    Type Title Date
    Certificate ADS4125EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
    Data sheet ADS41xx 14-, 12-Bit, 65-, 125-MSPS, Ultra-Low-Power ADC datasheet (Rev. C) Jun. 08, 2017
    User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) Jul. 10, 2012
    User guide ADS41xx/58B18EVM User's Guide.. (Rev. C) May 15, 2012

    Related design resources

    Hardware development

    TSW1400EVM Data Capture/Pattern Generator: Data Converter Evaluation Module With 8 LVDS Lanes up to 1.5Gbps TSW1405EVM Data converter data capture evaluation module with 8 LVDS lanes up to 1.0 Gbps

    Software development

    DATACONVERTERPRO-SW High-speed data converter pro software

    Support & training

    TI E2E™ forums with technical support from TI engineers

    View all forum topics

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