ADS54J42EVM

ADS54J42 Dual-Channel, 14-Bit, 625-MSPS Analog-to-Digital Converter Evaluation Module

ADS54J42EVM

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Overview

The ADS54J42EVM is an evaluation module (EVM) that allows for the evaluation of Texas Instruments’ ADS54J42 and LMK04828 clock jitter cleaner. The ADS54J42 is a low power, 14-bit, 625-GMSPS analog to digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B interface. The EVM has transformer coupled analog inputs to accommodate a wide range of signal sources and frequencies. The LMK04828 provides an ultra-low-jitter and phase noise ADC sample clock along with System Reference clocks and Device Sample clock for a complete JESD204B subclass 1 clocking solution.

The ADS54J42 and LMK04828 are controlled through an easy to use software GUI to enable quick configuration for a variety of uses.

The ADS54J42EVM connects directly to the TSW14J56EVM data capture hardware via the high speed FMC connector. The High Speed Data Converter Pro Software is also available for data capture and analysis support when using the TSW14J56EVM.

Features
  • Flexible transformer coupled analog input to allow for a variety of sources and frequencies
  • Easy to use software GUI to configure the ADS54J42 and LMK04828 for a variety of configurations through a USB interface
  • Quickly evaluate ADC performance through High Speed Data Converter Pro software
  • Simple connection to TSW14J56EVM capture card

USB cable
Cable Assy

High-speed ADCs (>10MSPS)
ADS54J42 Dual-Channel, 14-Bit, 625-MSPS Analog-to-Digital Converter (ADC)

 

Clock jitter cleaners & synchronizers
LMK04828 Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.

 

Linear regulators (LDO)
TPS7A8300 2-A, low-VIN, low-noise, ultra-low-dropout voltage regulator with power good with high-accuracy

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HARDWARE AND SOFTWARE PACKAGE

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Evaluation board

ADS54J42EVM – ADS54J42 Evaluation Module

TI's Standard Terms and Conditions for Evaluation Items apply.

Design files

ADS54JXXEVM-Design Package (Rev. A) SLAR116A.ZIP (5477 KB)

Technical documentation

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Type Title Date
* User guide ADS54J42EVM User's Guide Feb. 12, 2016
Certificate ADS54J42EVM EU Declaration of Conformity (DoC) Jan. 02, 2019

Related design resources

Hardware development

EVALUATION BOARD
TSW14J50EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-6.5Gbps TSW14J56EVM Data capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-12.5Gbps

Software development

SUPPORT SOFTWARE
DATACONVERTERPRO-SW High-speed data converter pro software

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