CDCM7005BGA-EVM
CDCM7005 BGA Package Evaluation Module
CDCM7005BGA-EVM
Overview
The CDCM7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes voltage controlled crystal oscillator (VCXO) frequency to an external reference clock; generates very low phase noise (jitter) clock.
The PLL loop bandwidth and damping factor can be adjusted to meet different system requirements by selecting the external VCXO, loop filter components, frequency for PFD, and charge pump current.
As the system requires external components like a loop filter and VCXO, this EVM provides an excellent way to evaluate and modify the performance and parameters of the clock system in conjunction with the specific customer application.
- Output frequency up to 1500 MHz
- Loop bandwidth can be selected as low as 10 Hz or less to clean the system's clock jitter
- Can be used as a simple 1:5 LVPECL buffer with output dividing options
- Differential outputs programmable by serial peripheral interface (SPI)
Clock jitter cleaners & synchronizers
Clock generators
Order & start development
CDCM7005BGA-EVM – CDCM7005 BGA Package Evaluation Module
Technical documentation
Type | Title | Date | |
---|---|---|---|
More literature | CDCM7005BGA-EVM EU Declaration of Conformity (DoC) | Jan. 02, 2019 | |
User guide | CDCM7005 (BGA Package) Evaluation Module Manual (Rev. A) | Dec. 19, 2005 |
Related design resources
Hardware development
EVALUATION BOARD
Support & training
TI E2E™ forums with technical support from TI engineers
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