DAC34SH84EVM

DAC34SH84 Quad-Channel, 16-Bit, 1.5-GSPS Digital-to-Analog Converter Evaluation Module

DAC34SH84EVM

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Overview

The DAC34SH84EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments' four-channel, ultra-low power, 16-bit, 1.5 GSPS DAC34SH84 digital-to-analog converter (DAC) with 32-bit wide DDR LVDS data input, integrated 2x/4x/8x/16x interpolation filters, 32-bit NCO and PLL, and exceptional linearity at high IFs. The EVM provides a flexible environment to test the DAC34SH84 under a variety of clock, data input, and IF output conditions. For ease of use as a complete IF transmitter solution, the DAC34SH84EVM includes the Texas Instruments CDCE62005 clock generator/jitter cleaner for clocking the DAC34SH84. Besides providing a high-quality, low jitter DAC sampling clock to the DAC34SH84, the CDCE62005 also provides FPGA clocks to the TSW1400EVM (or TSW3100EVM) as FPGA reference clocks.

The EVM can be used along with TSW1400 (or TSW3100) to perform a wide range of tests and measurements. The TSW1400 (or TSW3100) generates the test patterns which are fed to the DAC34SH84 through a 1.5 GSPS* LVDS port. The on-board CDCE62005 can be used to synchronize the TSW1400 (or TSW3100) board to DAC34SH84EVM.

The DAC34SH84EVM is also compatible with Xilinx and Altera based FPGA EVMs and design kits for rapid evaluation and prototyping. The DAC34SH84EVM includes an HSMC input for direct connection to HSMC compatible Altera based FPGA EVMs. The FMC-DAC-ADAPTER board available from TI enables the connection of the DAC34SH84EVM to the FMC header on Xilinx based EVMs.

  • Comprehensive test capability for the DAC34SH84
  • Direct connection to TSW1400/TSW3100 signal generator
  • Includes CDCE62005 for clock generation or jitter cleaning
  • Software support with a full featured GUI for easy testing and prototyping
  • FMC-DAC-Adapter card compatible to connect with FMC interconnect headers available Xilinx based FPGA EVMs
  • Direct compatibility with HSMC headers on Altera based FPGA EVMs
  • Note: The TSW1400 EVM supports up to 1.5GSPS LVDS toggle rate while the TSW3100 EVM only supports up to 1.25GSPS LVDS toggle rate. To fully evaluate the DAC34SH84’s 750MSPS data rate per DAC, the TSW1400 EVM is required.
  • High-speed DACs (>10MSPS)
    DAC3482 Dual-Channel, 16-Bit, 1.25-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC) DAC3484 Quad-Channel, 16-Bit, 1.25-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC) DAC34H84 Quad-Channel, 16-Bit, 1.25-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC) DAC34SH84 Quad-Channel, 16-Bit, 1.5-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC)

     

    Clock generators
    CDCE62005 5/10 Outputs Clock Generator/Jitter Cleaner with Integrated Dual VCO

     

    Clock jitter cleaners & synchronizers
    LMK04803 Low Noise Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 1.9 GHz VCO LMK04805 Low Noise Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO LMK04806 Low Noise Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK04808 Low-Noise Clock Jitter Cleaner with Dual Loop PLLs and Integrated 2.9 GHz VCO

     

    IQ modulators
    TRF3705 300MHz to 4GHz Quadrature Modulator TRF372017 300 MHz to 4.8GHz Quadrature Modulator with integrated wideband PLL/VCO

     

    RF PLLs & synthesizers
    TRF3765 300M-4800MHz Low Noise Integer-N/Fractional-N PLL with Integrated VCO and up to 8 Outputs
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    Order & start development

    Evaluation board

    DAC34SH84EVM – DAC34SH84 Evaluation Module

    Evaluation board

    DAC34SH84EVM-BDL – DAC34SH84EVM + TSW1400EVM Data Capture / Pattern Generator Bundle

    GUI for evaluation module (EVM)

    DAC348x EVM Software GUI (Rev. B) – SLAC483B.ZIP (105658KB)

    TI's Standard Terms and Conditions for Evaluation Items apply.

    Design files

    Technical documentation

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    Type Title Date
    More literature DAC34SH84EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
    User guide DAC348x EVM User's Guide (Rev. A) May 03, 2016
    User guide Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) Jul. 10, 2012

    Related design resources

    Hardware development

    EVALUATION BOARD
    TSW1400EVMData Capture/Pattern Generator: Data Converter Evaluation Module With 8 LVDS Lanes up to 1.5Gbps
    TSW1406EVMData Capture/Pattern Generator: Data Converter Evaluation Module With 8 LVDS Lanes up to 1.0Gbps
    TSW30SH84EVMWideband Transmit Signal Chain Evaluation Board and Reference Design
    INTERFACE ADAPTER
    FMC-DAC-ADAPTERHigh Speed DAC to FMC (Xilinx) Header Adapter Card

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