LMK04803BEVAL

Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 1.9 GHz VCO

LMK04803BEVAL

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Overview

The LMK04800 family is the industry's highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next generation system requirements. The dual loop PLLatinum? architecture enables 111 fs rms jitter (12 kHz to 20 MHz) using a low noise VCXO module or sub-200 fs rms jitter (12 kHz to 20 MHz) using a low cost external crystal and varactor diode.

The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides a low-noise jitter cleaner function while the second PLL (PLL2) performs the clock generation. PLL1 can be configured to either work with an external VCXO module or the integrated crystal oscillator with an external tunable crystal and varactor diode. When used with a very narrow loop bandwidth, PLL1 uses the superior close in phase noise (offsets below 50 kHz) of the VCXO module or the tunable crystal to clean the input clock. The output of PLL1 is used as the clean input reference to PLL2 where it locks the integrated VCO. The loop bandwidth of PLL2 can be optimized to clean the far-out phase noise (offsets above 50 kHz) where the integrated VCO outperforms the VCXO module or tunable crystal used in PLL1.

Features
  • Multi-mode: Dual PLL, single PLL, and clock distribution
  • Dual Loop PLLatinum PLL Architecture
    - PLL1
    > Holdover mode when input clocks are lost
    + Automatic or manual triggering/recovery
    - PLL2
    > Integrated Low-Noise VCO
  • 2 redundant input clocks with LOS
    - Automatic and manual switch-over modes
  • 50% duty cycle output divides, 1 to 1045 (even and odd)
  • LVPECL, LVDS, or LVCMOS programmable outputs
  • Precision digital delay, fixed or dynamically adjustable
  • 25 ps step analog delay control.
  • 14 differential outputs. Up to 26 single ended.
    - Up to 6 VCXO/Crystal buffered outputs
  • 0-delay mode

Contents

  • Evaluation board
  • LPT programming cable (USB interface available separately)
  • Quick start sheet
Clock jitter cleaners & synchronizers
LMK04803 Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO
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Get started

  1. Order the LMK04803BEVAL
  2. Download and install TICSPRO-SW
  3. Read the LMK04803BEVAL user’s guide
  4. Configure registers on TICSRPRO-SW

Order & start development

Evaluation board

LMK04803BEVAL/NOPB — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 1.9 GHz VCO

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Support software

TICSPRO-SW — TICS Pro v1.7.7.2, 05-Feb-2024

Supported products & hardware
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TICSPRO-SW TICS Pro v1.7.7.2, 05-Feb-2024

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Version: 1.7.7.2
Release date: 05 Feb 2024
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TICS Pro 1.7.7.2 installer binary for Windows operating system

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Documentation

TICS Pro 1.7.7.2 Release Notes

TICS Pro 1.7.7.2 Software Manifest

Release Infomation

Bug Fixes

  • Fix locale issue causing floating point numbers to be parsed incorrectly in some locales
  • Fix incorrect check for .NET Framework 4.8
  • Stack trace include in error log when available
  • Fix LMK05318B EEPROM export text to properly display "R157" instead of "R171"
  • USB2ANY firmware revision update: v2.9.1.2
    • If pin 77 of MSP430 was grounded, v2.9.1.1 firmware would not initialize I2C on the correct pins. This is corrected in v2.9.1.2
    • Update affects Reference PRO, LMX1214, and LMX1906-SP evaluation modules

Known Issues

  • LMK5C33216
    • When cascading from VCO3 to DPLL input, the divide value must manually be entered into DPLLx_REF5_RDIV as ( VCO3 output frequency / DPLLx TDC frequency )
  • LMK05318
    • In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
  • Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
  • User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.

 

What's new

  • Added LMX1214, LMX1906-SP
  • USB2ANY firmware revision update: v2.9.1.2
TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
* EVM User's guide LMK0480x Evaluation Board Instructions (Rev. B) 04 Aug 2014
Certificate LMK04803BEVAL/NOPB EU Declaration of Conformity (DoC) 02 Jan 2019
EVM User's guide LMK048xx Evaluation Board User's Guide 26 Nov 2013
EVM User's guide LMK0480x Evaluation Board Instructions 27 Jan 2012

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