Reference Design for 12Vin, Two Phase Synchronous Buck Converter 1V 50A with PMBus Control
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Fixed frequency voltage mode control is used for CPU, Memory and ASIC applications where a predictable frequency and/or synchronization to an external clock is needed.  Two high current synchronous power stages provide the high currents and low losses needed for these applications. Multi-phase also allows output ripple cancellation and effective higher bandwidth control for a given switching frequency. PMP11196 focuses on ease of electrical testing and ability to make changes "on the fly" through the PMBus interface. A high speed dynamic load rounds out the rich test interface.

  • Two fully synchronous power stages for high currents & lowest losses
  • Fixed frequency voltage mode control allows for user selection of switching frequency and synchronization to an external clock
  • Output voltage, current limit and fault thresholds/responses can be adjusted "on the fly" through the PMBus interface
  • Focus of evaluation board is on compactness of power stages including inductors
  • Rich test interface including PMBus socket, and high speed dynamic test load
  • Schematic, BOM, layout and Test Report focusing on thermal performance & load dynamics

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(Output Voltage 1)
Vin (Min) (V)10.8
Vin (Max) (V)13.2
Vout (Nom) (V)1
Iout (Max) (A)50
Output Power (W)50
Input TypeDC
TopologyBuck- Multiphase

TI Devices (2)

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Part Number Name Product Family Sample & Buy Design Kits & Evaluation Modules
TPS40425  Dual Output, 2-Phase, Stackable PMBUS Synchronous Buck Driverless Controller  Step-down (buck) regulators  Sample & Buy View Design Kits & Evaluation Modules
UCD74120  14 V, 25 A synchronous buck power stage with output current monitoring  Digital power ICs  Sample & Buy Not Available

CAD/CAE symbols

Part # Package | Pins CAD File (.bxl) STEP Model (.stp)
TPS40425 Download Download
UCD74120 Download Download

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Technical documentation

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User guides (1)
Title Type Size (KB) Date
PDF 2093 08 Jan 2016
Design files (5)
Title Type Size (KB) Date
ZIP 551 08 Jan 2016
PDF 3024 08 Jan 2016
PDF 279 08 Jan 2016
PDF 118 08 Jan 2016
PDF 246 08 Jan 2016

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