Complete Power Solution for DDR or DDR2 Memory Applications


Design files


This DDR reference design provides a VDDQ of 2.5V @ 6A and a VTT of 1.25V. The 2.5V sync buck converter achieves an efficiency of 92% while the 1.25V minimizes area by implementing a built-in LDO and has excellent tracking performance.

  • Complete power solution for DDR or DDR2 memory applications
  • High efficiency (92%) synchronous controller with integrated LDO
  • Adaptive on-time control for fast transient response
  • Supports all three sleep states, suspend to RAM, soft-off, suspend to disk

Output voltage options PMP1516.1 PMP1516.2
Vin (Min) (V) 10.8 10.8
Vin (Max) (V) 13.2 13.2
Vout (Nom) (V) 2.5 1.25
Iout (Max) (A) 6 3
Output Power (W) 15 3.75
Isolated/Non-Isolated Non-Isolated Non-Isolated
Input Type DC DC
Topology Buck- Synchronous Linear Regulator
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

SLVR750.PDF (1306 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

SLVR748.PDF (66 K)

Detailed schematic diagram for design layout and components

SLVR749.PDF (109 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDC130.ZIP (170 K)

Design file that contains information on physical board layer of design PCB


Includes TI products in the design and potential alternatives.

Multi-channel ICs (PMICs)

TPS51116Complete DDR, DDR2, DDR3, DDR3L, LPDDR3 and DDR4 power solution synchronous buck controller, 3A LDO

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
Test report PMP1516 Test Results Sep. 16, 2013

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