36Vdc-75Vdc Input, 20V @ 4A Output, Active Clamp Forward


Design files


The PMP3799 reference design provides an adjustible 20V output at 4A from a standard 48V telecom input with greater than 93% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The output voltage can be adjusted from 16V to 24V by changing a single resistor value. The circuit is built in an industry standard quarter-brick footprint.

Output voltage options PMP3799.1
Vin (Min) (V) 36
Vin (Max) (V) 75
Vout (Nom) (V) 20
Iout (Max) (A) 4
Output Power (W) 80
Isolated/Non-Isolated Isolated
Input Type DC
Topology Forward- Active Clamp
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

SLUUAE4.PDF (1018 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

SLURA42.PDF (62 K)

Detailed schematic diagram for design layout and components

SLURA43.PDF (19 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

SLUC443.ZIP (160 K)

Design file that contains information on physical board layer of design PCB


PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

AC/DC & DC/DC controllers (external FET)

UCC2897A110-V active clamp current mode PWM controller with P-channel clamp FET and line OV protection

Data sheet: PDF | HTML
Digital isolators

ISO721MSingle-channel, 150-Mbps digital isolator

Data sheet: PDF | HTML
Half-bridge drivers

TPS282254-A, 27-V half bridge gate driver with 4-V UVLO for synchronous rectification

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
Test report PMP3799 Test Results Apr. 14, 2013

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