PMP4844

18Vdc-54Vdc Input, 24V @ 5A Output, Active Clamp Forward

PMP4844

Design files

Overview

The PMP4844 reference design provides an isolated 24V output at 120W from an 18V to 54V telecom input with up to 94% efficiency. This design uses the UCC2897A active clamp controller along with an ISO721 digital isolator and TPS28225 to drive synchronous rectifiers. The circuit is built in an industry standard Half-Brick footprint.

Output voltage options PMP4844.1
Vin (Min) (V) 18
Vin (Max) (V) 54
Vout (Nom) (V) 24
Iout (Max) (A) 5
Output Power (W) 120
Isolated/Non-Isolated Isolated
Input Type DC
Topology Forward- Active Clamp^Forward- Synchronous

A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

SLUU562.PDF (2054 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

SLUR369.PDF (66 K)

Detailed schematic diagram for design layout and components

SLUR370.PDF (37 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

SLUC437.ZIP (160 K)

Design file that contains information on physical board layer of design PCB

SLUUAD6.PDF (72 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

Digital isolators

ISO721MSingle-channel, 150-Mbps digital isolator

Data sheet document-pdfAcrobat PDF open-in-new HTML
Half-bridge drivers

TPS282254-A, 27-V half bridge gate driver with 4-V UVLO for synchronous rectification

Data sheet document-pdfAcrobat PDF open-in-new HTML
PWM controllers

UCC2897A110-V active clamp current mode PWM controller with P-channel clamp FET and line OV protection

Data sheet document-pdfAcrobat PDF open-in-new HTML

Technical documentation

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Type Title Date
Test report PMP4844 Test Results Aug. 15, 2011

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