18Vdc-60Vdc Input, 3.3V @ 30A Output, 93% Efficient Active Clamp Forward


Design files


The PMP8252 reference design provides 3.3V at 30A from a wide range 18V-60V telecom input with a peak efficiency that is greater than 93%. This design uses the UCC2897A active clamp controller along with Texas Instruments' NexFET power MOSFETs for synchronous rectification.

Output voltage options PMP8252.1
Vin (Min) (V) 18
Vin (Max) (V) 60
Vout (Nom) (V) 3.3
Iout (Max) (A) 30
Output Power (W) 99
Isolated/Non-Isolated Isolated
Input Type DC
Topology Forward- Active Clamp
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

SLUU998.PDF (1980 K)

Test results for the reference design, including efficiency graphs, test prerequisites and more

SLUR935.PDF (88 K)

Detailed schematic diagram for design layout and components

SLUR936.PDF (21 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

SLUC379.ZIP (357 K)

Design file that contains information on physical board layer of design PCB

SLUU999.PDF (347 K)

PCB layer plot file used for generating PCB design layout


Includes TI products in the design and potential alternatives.

AC/DC & DC/DC controllers (external FET)

UCC2897A110-V active clamp current mode PWM controller with P-channel clamp FET and line OV protection

Data sheet: PDF | HTML

CSD17312Q530-V, N channel NexFET™ power MOSFET, single SON 5 mm x 6 mm, 1.7 mOhm

Data sheet: PDF

Technical documentation

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Type Title Date
Test report PMP8252 Test Results Aug. 06, 2012

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