4 GHz Clock Reference Design for 12 Bit High Speed ADCs in Digital Oscilloscopes & Wireless Testers
TIDA-01015
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Key Document
- 4GHz Clock for 12Bit High Speed ADCs in DSO and Wireless Testers Ref Design
(PDF 929 KB)
14 Dec 2016
- TIDA-01015 Schematic
(PDF 398 KB)
14 Dec 2016
- TSW14J56 JESD204B High-Speed Data Capture/ Pattern Generator Card User's Guide (Rev. C)
(PDF 6664 KB)
11 Jan 2016
Description
The TIDA-01015 is a clocking solution reference design for high speed direct RF sampling GSPS ADCs. This design showcases the significance of the sampling clock to achieve high SNR for 2nd Nyquist zone input signal frequencies. ADC12J4000 is a 12-bit, 4-GSPS RF sampling ADC with 3-dB input bandwidth of 3.2 GHz capable of capturing signals up to 4 GHz. This design highlights a clocking solution for the ADC12J4000 using TRF3765, to achieve high SNR performance at high input frequencies used in applications such as digital storage oscilloscopes (DSO) and wireless testers.
Features
- 12-bit, 4-GSPS RF sampling ADC clocking solution
- Up to 4-GHz input signal capture capability
- JESD204B compliant low-phase noise clocking solution for RF sampling ADC
See the Important Notice and Disclaimer covering reference designs and other TI resources.