Cascade imaging radar capture reference design using Jacinto™ ADAS processor
TIDEP-01017
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Description
The cascade development kit has two main use cases:
- To use the MMWCAS-DSP-EVM as a capture card to fully evaluate the AWR2243 four-chip cascade performance by using the mmWave studio tool, please read the TIDEP-01012 design guide.
- To use the MMWCAS-DSP-EVM to develop radar real time SW application, please read the TIDEP-01017 design guide.
This reference design provides a processing foundation for a cascaded imaging radar system. Cascade radar devices can support front, long-range (LRR) beam-forming applications as well as corner- and side-cascade radar and sensor fusion systems. This reference design provides qualified developers the design materials to create a functioning software evaluation platform for developing and testing ADAS applications. The design will assist in shortening the development time of a base platform supporting multiple automotive radar front end and antenna subsystems.
Features
- Compatible with SVTronics AWRx cascade imaging radar antenna reference design
- 4x Lattice Crossfire FPGA-based interfaces (1 ea. per AWRx)
- High performance TDA2x device with 4 radar processing SIMD accelerators (1 EVE per AWRx)
- Ethernet & PCIe connectivity for control & data respectively
See the Important Notice and Disclaimer covering reference designs and other TI resources.