Compute Through Power Loss (CTPL) is a software utility for ultra-low-power MSP430FRxx FRAM microcontrollers that enables an application to easily save the CPU and peripheral states into non-volatile FRAM, before powering down or entering a deep-sleep mode like LPMx.5. CTPL then automatically restores the application where the application last executed (this is also referred to as context-save and restore). This TI design showcases how one can easily integrate the utility library to be used in their application. CTPL can enable a faster wake-up time from cold-start by bypassing the startup routine which can be cycle intensive.
Features
• Uses Compute Through Power Loss (CTPL) software utility • Complete shutdown with software state retention via VCC monitoring • Ease-of-use with low-power modes LPMx.5 • Ideal for energy harvesting applications
Texas Instruments and Accelerated Designs, Inc. have collaborated together to provide TI customers with schematic symbols and PCB layout footprints for TI products.
Step 2: Download the Symbol and Footprint from the CAD.bxl file table.
Texas Instruments and Accelerated Designs, Inc. have collaborated together to provide TI customers with schematic symbols and PCB layout footprints for TI products.
Both PCB footprints and schematic symbols are available for download in a vendor neutral format, which can then be exported to the leading EDA CAD/CAE design tools using the Ultra Librarian Reader. The reader is available as a (free download.).
The UL Reader is a subset of the Ultra Librarian toolset that can generate, import, and export components and their attributes in virtually any EDA CAD/CAE format.
