LMK04806BEVAL

具有双级联 PLL 和集成 2.5 GHz VCO 的时钟抖动消除器

LMK04806BEVAL

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概述

The LMK04800 family is the industry's highest performance clock conditioner with superior clock jitter cleaning, generation, and distribution with advanced features to meet next generation system requirements. The dual loop PLLatinum? architecture enables 111 fs rms jitter (12 kHz to 20 MHz) using a low noise VCXO module or sub-200 fs rms jitter (12 kHz to 20 MHz) using a low cost external crystal and varactor diode.

The dual loop architecture consists of two high-performance phase-locked loops (PLL), a low-noise crystal oscillator circuit, and a high-performance voltage controlled oscillator (VCO). The first PLL (PLL1) provides a low-noise jitter cleaner function while the second PLL (PLL2) performs the clock generation. PLL1 can be configured to either work with an external VCXO module or the integrated crystal oscillator with an external tunable crystal and varactor diode. When used with a very narrow loop bandwidth, PLL1 uses the superior close in phase noise (offsets below 50 kHz) of the VCXO module or the tunable crystal to clean the input clock. The output of PLL1 is used as the clean input reference to PLL2 where it locks the integrated VCO. The loop bandwidth of PLL2 can be optimized to clean the far-out phase noise (offsets above 50 kHz) where the integrated VCO outperforms the VCXO module or tunable crystal used in PLL1.

特性
  • Multi-mode: Dual PLL, single PLL, and clock distribution
  • Dual Loop PLLatinum PLL Architecture
    - PLL1
    > Holdover mode when input clocks are lost
    + Automatic or manual triggering/recovery
    - PLL2
    > Integrated Low-Noise VCO
  • 2 redundant input clocks with LOS
    - Automatic and manual switch-over modes
  • 50% duty cycle output divides, 1 to 1045 (even and odd)
  • LVPECL, LVDS, or LVCMOS programmable outputs
  • Precision digital delay, fixed or dynamically adjustable
  • 25 ps step analog delay control.
  • 14 differential outputs. Up to 26 single ended.
    - Up to 6 VCXO/Crystal buffered outputs
  • 0-delay mode

Contents:

  • Evaluation board
  • LPT programming cable (USB interface available separately)
  • Quick start sheet
时钟抖动清除器和同步器
LMK04806 Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.5-GHz VCO

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评估板

LMK04806BEVAL/NOPB – Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO

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技术文档

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类型 标题 下载最新的英文版本 日期
* 用户指南 LMK0480x Evaluation Board Instructions (Rev. B) 2014年 8月 4日
更多文献资料 LMK04806BEVAL/NOPB EU Declaration of Conformity (DoC) 2019年 1月 2日
用户指南 LMK048xx Evaluation Board User's Guide 2013年 11月 26日
用户指南 Clock Jitter Cleaner w/Dual Cascaded PLLs & Integrated 1.9 GHz VCO User Guide 2012年 1月 27日

相关设计资源

软件开发

应用软件和框架
CLOCKDESIGNTOOL 时钟设计工具 - 环路滤波器和器件配置 + 仿真
IDE、配置、编译器或调试器
CODELOADER CodeLoader 器件寄存器编程

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