PRU-ICSS: Interfacing a processor with multiple ADCs
00:02:33 | 27 APR 2018
Select TI processors feature a unique subsystem, called the Programmable-Real-Time Unit Industrial Communications Subsystem (PRU-ICSS). This enables the integration of real-time industrial communications protocols and eliminates the need for an external ASIC or FPGA. This video demonstrates how the PRU-ICSS subsystem can provide flexible interface between the processor and multiple Analog-to-Digital Converters (ADCs) to enhance data acquisition performance.
This video is part of a series
Programmable real-time unit and industrial communications subsystem
AM6x Sitara™ processors
Sitara™ AM57x processors