Table 3. Design Parameters

8.2.2.1 Inductor Selection

The bq24640 has a 600-kHz switching frequency to allow the use of small inductor and capacitor values. The inductor saturation current must be higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):

Equation 6.

The inductor ripple current depends on input voltage (VIN), duty cycle (D = V_OUT / V_IN), switching frequency (fs), and inductance (L):

Equation 7.

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. Usually inductor ripple is designed in the range of (20–40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design.

8.2.2.2 Input Capacitor

Input capacitor must have enough ripple current rating to absorb input switching ripple current. The worst-case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current I_CIN occurs where the duty cycle is closest to 50% and can be estimated by the following equation:

Equation 8.

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and must be placed to the drain of the high-side MOSFET and source of the low-side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. A 25-V rating or higher capacitor is preferred for 20-V input voltage. The 20-μF capacitance is suggested for typical of 3-A to 4-A charging current.

8.2.2.3 Output Capacitor

Output capacitor also must have enough ripple current rating to absorb output switching ripple current. The output capacitor RMS current I_COUT is given:

Equation 9.

The output capacitor voltage ripple can be calculated as follows:

Equation 10.

At certain input/output voltage and switching frequency, the voltage ripple can be reduced by increasing the output filter LC.

The bq24640 has internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor must be designed from 12 kHz to 17 kHz. The preferred ceramic capacitor is 25 V or higher rating, X7R or X5R.

8.2.2.4 Power MOSFETs Selection

Two external N-channel MOSFETs are used for a synchronous switching charger. The gate drivers are internally integrated into the IC with 6 V of gate drive voltage. 30-V or higher voltage rating MOSFETs are preferred for 20-V input voltage and 40-V or higher rating MOSFETs are preferred for 20-V to 28-V input voltage.

Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction loss and switching loss. For top side MOSFET, FOM is defined as the product of the ON-resistance of the MOSFET, R_DS(ON), and the gate-to-drain charge, Q_GD. For bottom-side MOSFET, FOM is defined as the product of the ON-resistance of the MOSFET, R_DS(ON), and the total gate charge, Q_G.

Equation 11.

The lower the FOM value, the lower the total power loss. Usually lower R_DS(ON) has higher cost with the same package size.

The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D=V_OUT/V_IN), charging current (I_CHG), ON-resistance of the MOSFET (R_DS(ON)), input voltage (V_IN), switching frequency (F), turnon time (t_on), and turnoff time (t_off):

Equation 12.

The first item represents the conduction loss. Usually MOSFET R_DS(ON) increases by 50% with 100ºC junction temperature rise. The second term represents the switching loss. The MOSFET turnon and turnoff times are given by:

Equation 13.

where

• Q_SW is the switching charge
• Ion is the turn-on gate driving current
• IOFF is the turn-off gate driving current.

If the switching charge is not given in MOSFET datasheet, it can be estimated by gate-to-drain charge (Q_GD) and gate-to-source charge (Q_GS):

Equation 14.

Gate driving current total can be estimated by REGN voltage (V_REGN), MOSFET plateau voltage (V_PLT), total turnon gate resistance (R_ON) and turnoff gate resistance R_OFF) of the gate driver:

Equation 15.

The conduction loss of the bottom-side MOSFET is calculated with Equation 16 when it operates in synchronous continuous conduction mode:

Equation 16.

If the SRP-SRN voltage decreases below 5 mV (the charger is also forced into nonsynchronous mode when the average SRP-SRN voltage is lower than 1.25 mV), the low-side FET will be turned off for the remainder of the switching cycle to prevent negative inductor current.

As a result all the freewheeling current goes through the body-diode of the bottom-side MOSFET. The maximum charging current in nonsynchronous mode can be up to 0.9 A (0.5 A typical) for a 10-mΩ charging current-sensing resistor considering IC tolerance. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum nonsynchronous mode charging current.

MOSFET gate driver power loss contributes to the dominant losses on controller IC, when the buck converter is switching. Choosing the MOSFET with a small Q_{g_total} will reduce the IC power loss to avoid thermal shutdown.

Equation 17.

where

• Q_{g_total} is the total gate charge for both upper and lower MOSFET at 6-V VREGN.

8.2.2.5 Input Filter Design

During adapter hot plug-in, the parasitic inductance and input capacitor from the adapter cable form a second-order system. The voltage spike at VCC pin may be beyond IC maximum voltage rating and damage IC. The input filter must be carefully designed and tested to prevent an overvoltage event on VCC pin.

There are several methods to damping or limit the overvoltage spike during adapter hot plug-in. An electrolytic capacitor with high ESR as an input capacitor can damp the over voltage spike well below the IC maximum pin voltage rating. A high current capability TVS Zener diode can also limit the overvoltage level to an IC safe level. However these two solutions may not have low cost or small size.

A cost effective and small size solution is shown in Figure 12. The R1 and C1 are composed of a damping RC network to damp the hot plug-in oscillation. As a result, the overvoltage spike is limited to a safe level. D1 is used for reverse-voltage protection for VCC pin. C2 is the VCC pin decoupling capacitor and must be placed as close as possible to the VCC pin. The R2 and C2 form a damping RC network to further protect the IC from high dv/dt and high-voltage spike. C2 value must be less than C1 value so R1 can dominant the equivalent ESR value to get enough damping effect for hot plug-in. R1 and R2 package must be sized enough to handle inrush current power loss according to resistor manufacturer’s datasheet. The filter components value must always be verified with real application and minor adjustments may must fit in the real application circuit.

Figure 12. Input Filter

8.2.2.6 Inductor, Capacitor, and Sense Resistor Selection Guidelines

The bq24640 provides internal loop compensation. With this scheme, best stability occurs when the LC resonant frequency, f_o, is approximately 12 kHz to 17 kHz. Table 4 provides a summary of typical LC components for various charge currents.

See Inductor Selection for information on controlling ripple current.