SLUSBU6B September   2014  – January 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Supply Current
    6. 6.6  Digital Input and Output DC Electrical Characteristics
    7. 6.7  Power-on Reset
    8. 6.8  2.5-V LDO Regulator
    9. 6.9  Internal Clock Oscillators
    10. 6.10 ADC (Temperature and Cell Measurement) Characteristics
    11. 6.11 Integrating ADC (Coulomb Counter) Characteristics
    12. 6.12 Data Flash Memory Characteristics
    13. 6.13 I2C-compatible Interface Communication Timing Requirements
    14. 6.14 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Functional Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Modes
      2. 7.4.2 BAT INSERT CHECK Mode
      3. 7.4.3 NORMAL Mode
      4. 7.4.4 SLEEP Mode
      5. 7.4.5 SLEEP+ Mode
      6. 7.4.6 HIBERNATE Mode
    5. 7.5 Programming
      1. 7.5.1 Standard Data Commands
      2. 7.5.2 Control( ): 0x00 and 0x01
      3. 7.5.3 Charger Data Commands
      4. 7.5.4 Communications
        1. 7.5.4.1 I2C Interface
        2. 7.5.4.2 I2C Time Out
        3. 7.5.4.3 I2C Command Waiting Time
        4. 7.5.4.4 I2C Clock Stretching
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 BAT Voltage Sense Input
        2. 8.2.2.2 SRP and SRN Current Sense Inputs
        3. 8.2.2.3 Sense Resistor Selection
        4. 8.2.2.4 TS Temperature Sense Input
        5. 8.2.2.5 Thermistor Selection
        6. 8.2.2.6 REGIN Power Supply Input Filtering
        7. 8.2.2.7 VCC LDO Output Filtering
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Power Supply Decoupling
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Sense Resistor Connections
      2. 10.1.2 Thermistor Connections
      3. 10.1.3 High-Current and Low-Current Path Separation
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

YZF Package
15-Pin CSP
bq27532-G1 bq8035_ds_pinout.gif

Pin Functions

PIN TYPE(1) DESCRIPTION
NAME NUMBER
BAT E2 I Cell-voltage measurement input. ADC input. TI recommends 4.8 V maximum for conversion accuracy.
BI/TOUT E3 IO Battery-insertion detection input. Power pin for pack thermistor network. Thermistor-multiplexer control pin. Use with pullup resistor > 1 MΩ (1.8 MΩ typical).
BSCL B2 O Battery charger clock output line for chipset communication. Use without external pullup resistor. Push-pull output.
BSDA C3 IO Battery charger data line for chipset communication. Use without external pullup resistor. Push-pull output.
CE D2 I Chip enable. Internal LDO is disconnected from REGIN when driven low.
Note: CE has an internal ESD protection diode connected to REGIN. TI recommends maintaining VCE ≤ VREGIN under all conditions.
REGIN E1 P Regulator input. Decouple with 0.1-μF ceramic capacitor to VSS.
SCL A3 I Slave I2C serial communications clock input line for communication with system (master). Open-drain IO. Use with 10-kΩ pullup resistor (typical).
SDA B3 IO Slave I2C serial communications data line for communication with system (master). Open-drain IO. Use with 10-kΩ pullup resistor (typical).
SOC_INT A2 IO SOC state interrupts output. Generates a pulse as described in bq27532-G1 Technical Reference Manual, SLUUB04. Open-drain output.
SRN B1 AI Analog input pin connected to the internal coulomb counter where SRN is nearest the VSS connection. Connect to 5- to 20-mΩ sense resistor.
SRP A1 AI Analog input pin connected to the internal coulomb counter where SRP is nearest the PACK– connection. Connect to 5- to 20-mΩ sense resistor.
TS D3 AI Pack thermistor voltage sense (use 103AT-type thermistor). ADC input.
VCC D1 P Regulator output and bq27532-G1 device power. Decouple with 1-μF ceramic capacitor to VSS. Pin is not intended to power additional external loads.
VSS C1, C2 P Device ground
(1) IO = Digital input-output, AI = Analog input, P = Power connection