SLUSA91C October   2010  – October 2015

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: Supply Current
    6. 6.6  Power-On Reset (POR)
    7. 6.7  Wake From Sleep
    8. 6.8  RBI RAM Backup
    9. 6.9  3.3-V Regulator
    10. 6.10 2.5-V Regulator
    11. 6.11 PRES, SMBD, SMBC
    12. 6.12 CHG, DSG FET Drive
    13. 6.13 PCHG FET Drive
    14. 6.14 FUSE
    15. 6.15 Coulomb Counter
    16. 6.16 VC1, VC2, VC3, VC4
    17. 6.17 TS1, TS2
    18. 6.18 Internal Temperature Sensor
    19. 6.19 Internal Thermal Shutdown
    20. 6.20 High-Frequency Oscillator
    21. 6.21 Low-Frequency Oscillator
    22. 6.22 Internal Voltage Reference
    23. 6.23 Flash
    24. 6.24 OCD Current Protection
    25. 6.25 SCD1 Current Protection
    26. 6.26 SCD2 Current Protection
    27. 6.27 SCC Current Protection
    28. 6.28 SBS Timing Requirements
    29. 6.29 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Battery Parameter Measurements
      1. 7.1.1 Charge and Discharge Counting
      2. 7.1.2 Voltage
      3. 7.1.3 Current
      4. 7.1.4 Auto Calibration
      5. 7.1.5 Temperature
      6. 7.1.6 Communications
        1. 7.1.6.1 SMBus On and Off State
        2. 7.1.6.2 SBS Commands
  8. Detailed Description
    1. 8.1 Overview
      1. 8.1.1 Configuration
        1. 8.1.1.1 Oscillator Function
        2. 8.1.1.2 System Present Operation
        3. 8.1.1.3 2-, 3-, or 4-Cell Configuration
        4. 8.1.1.4 Cell Balancing
          1. 8.1.1.4.1 Internal Cell Balancing
          2. 8.1.1.4.2 External Cell Balancing
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Primary (1st Level) Safety Features
      2. 8.3.2 Secondary (2nd Level) Safety Features
      3. 8.3.3 Charge Control Features
      4. 8.3.4 Gas Gauging
      5. 8.3.5 Lifetime Data Logging Features
      6. 8.3.6 Authentication
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 High-Current Path
          1. 9.2.2.1.1 Protection FETs
          2. 9.2.2.1.2 Chemical Fuse
          3. 9.2.2.1.3 Lithium-Ion Cell Connections
          4. 9.2.2.1.4 Sense Resistor
          5. 9.2.2.1.5 ESD Mitigation
        2. 9.2.2.2 Gas Gauge Circuit
          1. 9.2.2.2.1 Differential Low-Pass Filter
          2. 9.2.2.2.2 Power Supply Decoupling and RBI
          3. 9.2.2.2.3 System Present
          4. 9.2.2.2.4 SMBus Communication
          5. 9.2.2.2.5 FUSE Circuitry
          6. 9.2.2.2.6 PFIN Detection
        3. 9.2.2.3 Secondary-Current Protection
          1. 9.2.2.3.1 Cell and Battery Inputs
          2. 9.2.2.3.2 External Cell Balancing
          3. 9.2.2.3.3 PACK and FET Control
          4. 9.2.2.3.4 Regulator Output
          5. 9.2.2.3.5 Temperature Output
        4. 9.2.2.4 Secondary-Overvoltage Protection
          1. 9.2.2.4.1 Cell Inputs
          2. 9.2.2.4.2 Time-Delay Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Example
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Power Supply Recommendations

Power supply decoupling is important for optimal operation of the bq3055 Gas Gauge. A single 1.0-μF ceramic decoupling capacitor from REG33 to VSS and REG25 to VSS must be placed adjacent to the integrated circuit (IC) pins.

The RBI pin is used to supply backup RAM voltage during brief transient-power outages. The partial reset mechanism makes use of RAM to restore the critical CPU registers following a temporary loss of power. A standard 0.1-μF ceramic capacitor is connected from the RBI pin to ground.