SLUSAX0E December   2012  – April 2021 BQ7716

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Sense Positive Input for Vx
      2. 8.3.2 Output Drive, OUT
      3. 8.3.3 Supply Input, VDD
      4. 8.3.4 External Delay Capacitor, CD
    4. 8.4 Device Functional Modes
      1. 8.4.1 NORMAL Mode
      2. 8.4.2 OVERVOLTAGE Mode
      3. 8.4.3 Customer Test Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Export Control Notice
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

Typical values stated where TA = 25°C and VDD = 14.4V, MIN/MAX values stated where TA = –40°C to +110°C and VDD = 3 V to 20 V (unless otherwise noted).

PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VOLTAGE PROTECTION THRESHOLD VCx
VOVV(PROTECT) Overvoltage DetectionBQ7716004.300V
BQ7716014.225V
BQ7716024.225V
BQ7716044.200V
BQ7716053.850V
BQ7716114.350V
BQ7716123.900V
VHYSOV Detection HysteresisBQ771600250300400mV
BQ771601255075mV
BQ771602255075mV
BQ771604255075mV
BQ771605200250300mV
BQ771611250300400mV
BQ771612250300400mV
VOAOV Detection AccuracyTA = 25°C–1010mV
VOADRIFTOV Detection Accuracy Across TemperatureTA = –40°C–4044mV
TA = 0°C–2020mV
TA = 60°C–2424mV
TA = 110°C–5454mV
SUPPLY AND LEAKAGE CURRENT
ICCSupply Current(V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V
(See Figure 8-3.)		12µA
IINInput Current at Vx Pins(V4–V3) = (V3–V2) = (V2–V1) = (V1–VSS) = 4.0 V
(See Figure 8-3.)		–0.10.1µA
OUTPUT DRIVE OUT, CMOS ACTIVE HIGH VERSIONS ONLY
VOUT1Output Drive Voltage, Active High(V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V, IOH = 100 µA6V
If three of four cells are short circuited, only one cell remains powered and > VOV, VDD = Vx (cell voltage), IOH = 100 µAVDD – 0.3V
(V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, IOL = 100 µA measured into OUT pin250400mV
IOUTH1OUT Source Current
(During OV)		(V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V, OUT = 0 V. Measured out of OUT pin4.5mA
IOUTL1OUT Sink Current (No OV)(V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, OUT = VDD.
Measured into OUT pin		0.514mA
OUTPUT DRIVE OUT, NCH OPEN DRAIN ACTIVE LOW VERSIONS ONLY
VOUT2Output Drive Voltage, Active Low(V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V, IOL = 100 µA measured into OUT pin250400mV
IOUTH2OUT Sink Current
(During OV)		(V4–V3), (V3–V2), (V2–V1), or (V1–VSS) > VOV, VDD = 14.4 V. OUT = VDD.
Measured into OUT pin		0.514mA
IOUTLKOUT Pin Leakage(V4–V3), (V3–V2), (V2–V1), and (V1–VSS) < VOV, VDD = 14.4 V, OUT = VDD. Measured out of OUT pin100nA
DELAY TIMER
tCDOV Delay TimeCCD = 0.1 µF
11.52s
VCDCD Fault Detection External Comparator Threshold, Initial Charge ValueThe CD pin will first be quickly charged to this value before being discharged back to VSS.1.5V
tCHGDELAYCD Charging DelayOVP to OUT delay with CD shorted to ground20170ms
ICHGOV Detection Charging CurrentCD pin fast charging current from VSS to VCD to begin delay countdown300µA
IDSGOV Detection Discharging CurrentCD pin discharging current from VDELAY to VSS100nA