SCAS793G June 2005 – August 2017 CDCM7005
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
High frequency input signals should be routed through shortest paths possible.
Continuous ground plane should be spread under the high signal routes to minimize the current loops.
Supply bypass caps should be placed as close to the device. Do not have vias between the bypass caps and the device.
Keep differential traces together to keep noise injection as a common-mode signal.
Route differential traces around obstacles together, do not separate. Keep traces together with exact same length to keep delays equal.
Top layer routing of clock signals has less propagation delay, immunity to noise could be enhanced by having ground planes on the same layer away by 2x trace width. The magnetic radiation is also enhanced by this ground layer. Ensure multiple vias are utilized and placed near signal traces on the ground plane.