SLPS476A June   2014  – May 2017 CSD18509Q5B

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
  4. 4Revision History
  5. 5Specifications
    1. 5.1 Electrical Characteristics
    2. 5.2 Thermal Information
    3. 5.3 Typical MOSFET Characteristics
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information
    1. 7.1 Q5B Package Dimensions
    2. 7.2 Recommended PCB Pattern
    3. 7.3 Recommended Stencil Pattern
    4. 7.4 Q5B Tape and Reel Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DNK|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Specifications

5.1 Electrical Characteristics

(TA = 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
STATIC CHARACTERISTICS
BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA 40 V
IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 32 V 1 μA
IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA
VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA 1.4 1.8 2.2 V
RDS(on) Drain-to-Source On Resistance VGS = 4.5 V, ID = 32 A 1.3 1.7 mΩ
VGS = 10 V, ID = 32 A 1 1.2 mΩ
gfs Transconductance VDS = 4 V, ID = 32 A 180 S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VGS = 0 V, VDS = 20 V, ƒ = 1 MHz 10700 13900 pF
Coss Output Capacitance 821 1070 pF
Crss Reverse Transfer Capacitance 272 354 pF
RG Series Gate Resistance 0.8 1.6 Ω
Qg Gate Charge Total (4.5 V) VDS = 20 V, ID = 32 A 70 91 nC
Qg Gate Charge Total (10 V) 150 195 nC
Qgd Gate Charge Gate-to-Drain 17 nC
Qgs Gate Charge Gate-to-Source 29 nC
Qg(th) Gate Charge at Vth 18 nC
Qoss Output Charge VDS = 20 V, VGS = 0 V 39 nC
td(on) Turn On Delay Time VDS = 20 V, VGS = 10 V,
IDS = 32 A, RG = 0 Ω		 9 ns
tr Rise Time 19 ns
td(off) Turn Off Delay Time 57 ns
tf Fall Time 11 ns
DIODE CHARACTERISTICS
VSD Diode Forward Voltage ISD = 32 A, VGS = 0 V 0.8 1 V
Qrr Reverse Recovery Charge VDS= 20 V, IF = 32 A,
di/dt = 300 A/μs		 40 nC
trr Reverse Recovery Time 23 ns

5.2 Thermal Information

(TA = 25°C unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJC Junction-to-Case Thermal Resistance(1) 0.8 °C/W
RθJA Junction-to-Ambient Thermal Resistance (1)(2) 50
(1) RθJC is determined with the device mounted on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inches × 1.5-inches (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.

CSD18509Q5B M0137-01_LPS198.gif
Max RθJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick) Cu.
CSD18509Q5B M0137-02_LPS198.gif
Max RθJA = 125°C/W when mounted on a minimum pad area of 2-oz. (0.071-mm thick) Cu.

5.3 Typical MOSFET Characteristics

(TA = 25°C unless otherwise stated)
CSD18509Q5B graph01_SLPS488.png
Figure 1. Transient Thermal Impedance
CSD18509Q5B graph02_SLPS476.png
Figure 2. Saturation Characteristics
CSD18509Q5B graph04_SLPS476.png
ID = 32 A VDS = 20 V
Figure 4. Gate Charge
CSD18509Q5B graph06_SLPS476.png
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
CSD18509Q5B graph08_SLPS476.png
ID = 32 A
Figure 8. Normalized On-State Resistance vs Temperature
CSD18509Q5B graph10_SLPS476.png
Single Pulse, Max RθJC = 0.8°C/W
Figure 10. Maximum Safe Operating Area
CSD18509Q5B graph12_SLPS476.png
Figure 12. Maximum Drain Current vs Temperature
CSD18509Q5B graph03_SLPS476.png
VDS = 5 V
Figure 3. Transfer Characteristics
CSD18509Q5B graph05_SLPS476.png
Figure 5. Capacitance
CSD18509Q5B graph07_SLPS476.png
Figure 7. On-State Resistance vs Gate-to-Source Voltage
CSD18509Q5B graph09_SLPS476.png
Figure 9. Typical Diode Forward Voltage
CSD18509Q5B graph11_SLPS476.png
Figure 11. Single Pulse Unclamped Inductive Switching