SNLS244H September 2006 – January 2016 DS42MB100
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The DS42MB100 is a 2:1 MUX and 1:2 buffer that equalizes input data up to 4.25 Gbps and provides transmit pre-emphasis controls to improve overall signal reach. As a MUX buffer, the DS42MB100 is ideal for designs where there is a need for port sharing or redundancy as well as on-the-fly reorganization of routes and data connections.
A typical application for the DS42MB100 is shown in Figure 10 and Figure 11.
In a typical design, the DS42MB100 equalizes a short backplane trace on its input, followed by a longer trace at the DS42MB100 output. In this application example, a 25-inch FR4 coupled micro-strip board trace is used in place of the short backplane link. A block diagram of this example is shown in Figure 12.
The 25-inch microstrip board trace has approximately 6 dB of attenuation between 375 MHz and 1.875 GHz, representing closely the transmission loss of the short backplane transmission line. The 25-inch microstrip is connected between the pattern generator and the differential inputs of the DS42MB100 for AC measurements.
TRACE LENGTH | FINISHED TRACE WIDTH W | SEPARATION BETWEEN TRACES | DIELECTRIC HEIGHT H | DIELECTRIC CONSTANT εR | LOSS TANGENT |
---|---|---|---|---|---|
25 inches | 8.5 mil | 11.5 mil | 6 mil | 3.8 | 0.022 |
The length of the output trace may vary based on system requirements. In this example, a 40-inch FR4 trace with similar trace width, separation, and dielectric characteristics, is placed at the DS42MB100 output.
As with any high speed design, there are many factors which influence the overall performance. Following is a list of critical areas for consideration and study during design.
For optimal design, the DS42MB100 must be configured to route incoming data correctly as well as provide the best signal quality. The following design procedures should be observed:
Figure 13 through Figure 18 show how the signal integrity varies at different places in the data path. These measured locations can be referenced back to the labeled points provided in Figure 12.
The source signal is a PRBS-7 pattern at 4 Gbps. For the long output traces, the eye after 40 inches of output FR4 trace is significantly improved by adding –9 dB of pre-emphasis.