SNLS623 September   2018 DSLVDS1047

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1. 3.1 Application Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 LVDS Fail-Safe
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Probing LVDS Transmission Lines
        2. 9.2.2.2 Data Rate vs Cable Length Graph Test Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Power Decoupling Recommendations
      2. 11.1.2 Differential Traces
      3. 11.1.3 Termination
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

PW Package
16-Pin TSSOP
Top View

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
2 DIN1 I Driver input pin, TTL/CMOS compatible
3 DIN2
6 DIN3
7 DIN4
10 DOUT4+ O Non-inverting driver output pin, LVDS levels
11 DOUT3+
14 DOUT2+
15 DOUT1+
9 DOUT4− O Inverting driver output pin, LVDS levels
12 DOUT3−
13 DOUT2−
16 DOUT1−
1 EN I Driver enable pin: When EN is low, the driver is disabled. When EN is high and EN* is low or open, the driver is enabled. If both EN and EN* are open circuit, then the driver is disabled.
8 EN* I Driver enable pin: When EN* is high, the driver is disabled. When EN* is low or open and EN is high, the driver is enabled. If both EN and EN* are open circuit, then the driver is disabled.
5 GND Ground pin
4 VCC Power supply pin, +3.3 V ± 0.3 V