SBOS743A July   2015  – May 2020 INA226-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      High-Side or Low-Side Sensing Application
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Basic ADC Functions
        1. 7.3.1.1 Power Calculation
        2. 7.3.1.2 Alert Pin
    4. 7.4 Device Functional Modes
      1. 7.4.1 Averaging and Conversion Time Considerations
      2. 7.4.2 Filtering and Input Considerations
    5. 7.5 Programming
      1. 7.5.1 Programming the Calibration Register
      2. 7.5.2 Programming the Power Measurement Engine
        1. 7.5.2.1 Calibration Register and Scaling
      3. 7.5.3 Simple Current Shunt Monitor Usage (No Programming Necessary)
      4. 7.5.4 Default Settings
      5. 7.5.5 Bus Overview
        1. 7.5.5.1 Serial Bus Address
        2. 7.5.5.2 Serial Interface
        3. 7.5.5.3 Writing to and Reading from the INA226-Q1
          1. 7.5.5.3.1 High-Speed I2C Mode
        4. 7.5.5.4 SMBus Alert Response
    6. 7.6 Register Maps
      1. Table 4. Register Set Summary
      2. 7.6.1    Configuration Register (00h) (Read/Write)
        1. Table 5. Configuration Register (00h) (Read/Write) Descriptions
      3. 7.6.2    Shunt Voltage Register (01h) (Read-Only)
        1. Table 10. Shunt Voltage Register (01h) (Read-Only) Description
      4. 7.6.3    Bus Voltage Register (02h) (Read-Only)
        1. Table 11. Bus Voltage Register (02h) (Read-Only) Description
      5. 7.6.4    Power Register (03h) (Read-Only)
        1. Table 12. Power Register (03h) (Read-Only) Description
      6. 7.6.5    Current Register (04h) (Read-Only)
        1. Table 13. Current Register (04h) (Read-Only) Register Description
      7. 7.6.6    Calibration Register (05h) (Read/Write)
        1. Table 14. Calibration Register (05h) (Read/Write) Description
      8. 7.6.7    Mask/Enable Register (06h) (Read/Write)
        1. Table 15. Mask/Enable Register (06h) (Read/Write)
      9. 7.6.8    Alert Limit Register (07h) (Read/Write)
        1. Table 16. Alert Limit Register (07h) (Read/Write) Description
      10. 7.6.9    Manufacturer ID Register (FEh) (Read-Only)
        1. Table 17. Manufacturer ID Register (FEh) (Read-Only) Description
      11. 7.6.10   Die ID Register (FFh) (Read-Only)
        1. Table 18. Die ID Register (FFh) (Read-Only) Description
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 High-Side Sensing Circuit Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
          1. Table 19. Configuration Register (00h) Settings for (Value = 4025h)
          2. Table 20. Configuration Register (00h) Settings for (Value = 4005h)
          3. Table 21. Mask/Enable Register (06h) Settings for and (Value = 8000h)
          4. Table 22. Alert Limit Register (07h) Settings for and (Value = 7D00)
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Filtering and Input Considerations

Measuring current is often noisy, and such noise can be difficult to define. The INA226-Q1 device offers several options for filtering by allowing the conversion times and number of averages to be selected independently in the Configuration Register (00h). The conversion times can be set independently for the shunt voltage and bus voltage measurements to allow added flexibility in configuring the monitoring of the power-supply bus.

The internal ADC is based on a delta-sigma (ΔΣ) front-end with a 500 kHz (±30%) typical sampling rate. This architecture has good inherent noise rejection; however, transients that occur at or very close to the sampling rate harmonics can cause problems. Because these signals are at 1 MHz and higher, they can be managed by incorporating filtering at the input of the device. The high frequency enables the use of low-value series resistors on the filter with negligible effects on measurement accuracy. In general, filtering the device input is only necessary if there are transients at exact harmonics of the 500 kHz (±30%) sampling rate (greater than 1 MHz). Filter using the lowest possible series resistance (typically 10 Ω or less) and a ceramic capacitor. Recommended values for this capacitor are between 0.1 μF and 1 μF. Figure 21 shows the device with a filter added at the input.

Overload conditions are another consideration for the device inputs. The device inputs are specified to tolerate 40 V across the inputs. A large differential scenario might be a short to ground on the load side of the shunt. This type of event can result in full power-supply voltage across the shunt (as long the power supply or energy storage capacitors support it). Removing a short to ground can result in inductive kickbacks that could exceed the 40-V differential and common-mode rating of the device. Inductive kickback voltages are best controlled by Zener-type transient-absorbing devices (commonly called transzorbs) combined with sufficient energy storage capacitance. See the TI Design, Transient Robustness for Current Shunt Monitors (TIDU473), which describes a high-side current shunt monitor used to measure the voltage developed across a current-sensing resistor when current passes through it.

In applications that do not have large energy storage electrolytics on one or both sides of the shunt, an input overstress condition may result from an excessive dV/dt of the voltage applied to the input. A hard physical short is the most likely cause of this event, particularly in applications with no large electrolytics present. This problem occurs because an excessive dV/dt can activate the ESD protection in the device in systems where large currents are available. Testing demonstrates that the addition of 10-Ω resistors in series with each input of the device sufficiently protects the inputs against this dV/dt failure up to the 40-V rating of the device. Selecting these resistors in the range noted has minimal effect on accuracy.

INA226-Q1 ai_input_filtering_bos547.gifFigure 21. Input Filtering