SBOSAI9B December   2023  – March 2024 INA500

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics - INA500A
    6. 6.6 Electrical Characteristics - INA500B
    7. 6.7 Electrical Characteristics - INA500C
    8. 6.8 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Options and Resistors
        1. 7.3.1.1 Gain Error and Drift
      2. 7.3.2 Input Common-Mode Voltage Range
      3. 7.3.3 EMI Rejection
      4. 7.3.4 Typical Specifications and Distributions
      5. 7.3.5 Electrical Overstress
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Reference Pin
    2. 8.2 Typical Applications
      1. 8.2.1 Battery Monitoring using Difference Amplifier
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DBV|6
  • DCK|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics - INA500C

For VS = (V+) – (V–) = 1.7V to 5.5V (±0.85V to ±2.75V) at TA = 25°C, VMID = [(V+) + (V–)] / 2,  G = 0.25, VREF = VMID, RL = 100kΩ connected to VMID, VCM = [(VIN+) + (VIN–)] / 2 = VMID, VIN = (VIN+) – (VIN–) = 0V and VOUT = VMID (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET
VOSO Offset voltage, RTO VS = 5.5V TA = 25°C ±0.40 ±2.2 mV
Offset voltage over T, RTO VS = 5.5V TA = –40°C to 125°C ±2.3 mV
Offset temp drift, RTO(1) VS = 5.5V TA = –40°C to 125°C ±1.1 5.5 µV/°C
PSRR Power-supply rejection ratio VS = 1.7V to 5.5V TA = 25°C   40 130 µV/V
INPUT IMPEDANCE
RIN-DM Differential Resistance 3360 kΩ 
RIN-CM Common-mode Resistance 1050 kΩ 
INPUT VOLTAGE
VCM Input common-mode Range VREF = VMID 5*(V–) – 4*(VREF) 5*(V+) – 4*(VREF) V
CMRR DC Common-mode rejection ratio, RTO VCM = [5*(V–) – 4*(VREF)] to [5*(V+) – 4*(VREF) – 3.5] VS = 5.5V, VREF = VMID 77.7 85 dB
CMRR DC Common-mode rejection ratio, RTO VCM = [5*(V–) – 4*(VREF)] to [5*(V+) – 4*(VREF)] VS = 5.5V, VREF = VMID 70 dB
NOISE VOLTAGE
eNI Output voltage noise density f = 1kHz 150 nV/√Hz
f = 10kHz 140
ENI Output voltage noise fB = 0.1Hz to 10Hz 7.5 µVPP
GAIN
GE Gain error(2) VREF = VMID VO = (V–) + 0.1 V to (V+) – 0.1V ±0.003 ±0.1 %
Gain drift vs temperature(2) G = 0.5 TA = –40°C to 125°C ±1 ppm/°C
OUTPUT
VOH Positive rail headroom RL = 10kΩ to VMID 15 25 mV
VOL Negative rail headroom RL = 10kΩ to VMID 15 20 mV
CL Drive Load capacitance drive VO = 100mV step, Overshoot < 20% 100 pF
ZO Closed-loop output impedance f = 10kHz 180
ISC Short-circuit current VS = 5.5V ±30 mA
FREQUENCY RESPONSE
BW Bandwidth, –3dB VIN = 10mVpk-pk 160 kHz
THD + N Total harmonic distortion + noise VS = 5.5V, VCM = 2.75V, VO = 1VRMS, RL = 100kΩ
ƒ = 1kHz, 80kHz measurement BW
0.017 %
EMIRR Electro-magnetic interference rejection ratio f = 1GHz, VIN_EMIRR = 100mV 105 dB
SR Slew rate VS = 5V, VO = 2V step 0.19 V/µs
tS Settling time To 0.1%, VS = 5.5V, VSTEP = 2V, CL = 10pF 20 µs
To 0.01%, VS = 5.5V, VSTEP = 2V, CL = 10pF 32
Settling time To 0.1%, VS = 5.5V, VOUT_STEP = 4V, CL = 10pF 26
To 0.01%, VS = 5.5V, VOUT_STEP = 4V, CL = 10pF 40
Overload recovery VSTEP = VS  / G 23.2 µs
REFERENCE INPUT
REF - VIN Input voltage range VS = 5.5V, VREF = VMID (V–)  (V+)  V
REF - G Reference gain to output 1 V/V
REF - GE Reference gain error(2) VS = 5.5V ±0.002 ±0.02 %
POWER SUPPLY
VS Power-supply voltage Dual-supply ±0.85 ±2.75 V
IQ Quiescent current VS = 1.7V 15 µA
IQ Quiescent current VS = 5.5V 14 19 µA
VS = 5.5V TA = –40°C to 125°C 20
Offset drifts are uncorrelated. 
Minimum and maximum values are specified by characterization.