SLLSEQ2A September 2016 – December 2016 ISO5852S-Q1
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
minimum of four layers is required to accomplish a low EMI PCB design (see Figure 60). Layer stacking should be in the following order (top-to-bottom): high-speed signal layer, ground plane, power plane and low-frequency signal layer.
For more detailed layout recommendations, including placement of capacitors, impact of vias, reference planes, routing, and other details, refer to the Digital Isolator Design Guide (SLLA284).
For digital circuit boards operating at less than 150 Mbps, (or rise and fall times greater than 1 ns), and trace lengths of up to 10 inches, use standard FR-4 UL94V-0 printed circuit board. This PCB is preferred over cheaper alternatives because of lower dielectric losses at high frequencies, less moisture absorption, greater strength and stiffness, and the self-extinguishing flammability-characteristics.