SLLSFF7A may   2021  – december 2021 ISOW1044

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description Continued
  7. 6 Device Comparison Table
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  ThermalInformation
    5. 8.5  Power Ratings
    6. 8.6  Insulation Specifications
    7. 8.7  Safety-Related Certifications
    8. 8.8  Safety Limiting Values
    9. 8.9  Electrical Characteristics
    10. 8.10 Supply Current Characteristics
    11. 8.11 Switching Characteristics
    12. 8.12 Insulation Characteristics Curves
    13. 8.13 Typical Characteristics
  10. 9 Parameter Measurement Information
  11. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Power Isolation
    3. 10.3 Signal Isolation
    4. 10.4 CAN Transceiver
      1. 10.4.1 Remote Wake Request via Wake-Up Pattern (WUP) in Standby Mode
    5. 10.5 Functional Block Diagram
    6. 10.6 Feature Description
      1. 10.6.1 CAN Bus States
      2. 10.6.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 10.6.3 TXD Dominant Timeout (DTO)
      4. 10.6.4 Power-Up and Power-Down Behavior
      5. 10.6.5 Protection Features
      6. 10.6.6 Floating Pins, Unpowered Device
      7. 10.6.7 Glitch-Free Power Up and Power Down
    7. 10.7 Device Functional Modes
    8. 10.8 Device I/O Schematics
  12. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Bus Loading, Length and Number of Nodes
        2. 11.2.2.2 CAN Termination
      3. 11.2.3 Application Curve
      4. 11.2.4 Insulation Lifetime
  13. 12Power Supply Recommendations
  14. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  15. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Receiving Notification of Documentation Updates
    3. 14.3 Support Resources
    4. 14.4 Trademarks
    5. 14.5 Electrostatic Discharge Caution
    6. 14.6 Glossary
  16. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.9 Electrical Characteristics

over recommended operating conditions, typical values are at VDD = 5V, GND1 = GNDIO, GND2 = GISOIN, VIO = 3.3 V and TA =25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Device
VISOOUT Isolated Output supply voltage EN=VDD, STB, TXD, IN floating 4.75 5 5.25 V
Iout Extra current available on Visoout VDD = 4.5 to 5.5 V, CAN full loaded 60 Ω, TXD toggling 5 Mbps, IN toggling 10 Mbps 20 mA
VOH Output high voltage on OUT pin VDD = 5 V ± 10%, IOH = –4 mA, IN = VIO VISOIN – 0.4 V
VOL Output low voltage on OUT pin VDD = 5 V ± 10%, IOL = 4 mA, IN = GND2 0.4 V
II Input current, IN IN at GND1 or VIO –25 25 µA
II Input current, EN EN at GND1 or VIO –25 25 µA
TXD TERMINAL
II Input leakage current TXD = VIO or GND1 –25 25 uA
CI Input capacitance VIN = 0.4 x sin(2 x π x 1E+6 x t) + 1.65 V, VIO = 3.3 V 2 pF
RXD TERMINAL
VOH  High level output voltage IO = -4 mA for 4.5 V ≤ VIO ≤ 5.5 V, See Figure 9-4 VIO – 0.4 VIO – 0.2 V
IO = -2 mA for 3.0 V ≤ VIO ≤ 3.6 V, See Figure 9-4 VIO – 0.2 VIO  – 0.06 V
IO = -1 mA for 2.25 V ≤ VIO ≤ 2.75 V, See Figure 9-4 VIO – 0.1 VIO – 0.04 V
IO = -1 mA for 1.71 V ≤ VIO ≤ 1.89 V, See Figure 9-4 VIO – 0.1 VIO – 0.04 V
VOL Low level output voltage IO = 4 mA for 4.5 V ≤ VIO ≤ 5.5 V, See Figure 9-4 0.2 0.4 V
IO = 2 mA for 3.0 V ≤ VIO ≤ 3.6 V, See Figure 9-4 0.07 0.2 V
IO = 1 mA for 2.25 V ≤ VIO ≤ 2.75 V, See Figure 9-4 0.035 0.1 V
 IO = 1 mA for 1.71 V ≤ VIO ≤ 1.89 V, See Figure 9-4 0.04 0.1 V
STB Terminal
II Input leakage current STB = VIO or GND1 -25 25 uA
CI Input capacitance VIN = 0.4 x sin(2 x π x 1E+6 x t) + 1.65 V, VIO = 3.3 V 2 pF
DRIVER ELECTRICAL CHARACTERISTICS
VO(DOM) Bus output voltage(Dominant), CANH  STB=GND1, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, and CL = open, See Figure 9-1 and Figure 9-2 2.75 4.5 V
Bus output voltage(Dominant), CANL STB=GND1, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, and CL = open, See Figure 9-1 and Figure 9-2 0.5 2.25 V
VO(REC) Bus output voltage(recessive), CANH and CANL STB=GND1, TXD = VIO and RL = open, See Figure 9-1 and Figure 9-2 2.0 0.5 x VISOIN 3.0 V
VOD(DOM) Differential output voltage(dominant) STB=GND1, TXD = 0 V, 45 Ω ≤ RL ≤ 70 Ω, and CL = open, See Figure 9-1 and Figure 9-2 1.4 3.3 V
Differential output voltage(dominant) STB=GND1, TXD = 0 V, 50 Ω ≤ RL ≤ 65 Ω, and CL = open, See Figure 9-1 and Figure 9-2 1.5 3.0 V
Differential output voltage(dominant)  STB=GND1, TXD = 0 V, RL = 2240 Ω, and CL = open, See Figure 9-1 and Figure 9-2 1.5 5.0 V
VOD(REC) Differential output voltage(recessive) TXD = VIO, RL = 60 Ω, and CL = open, See Figure 9-1 and Figure 9-2 –120.0 12.0 mV
Differential output voltage(recessive) TXD = VIO, RL = open, and CL = open, See Figure 9-1 and Figure 9-2 –50.0 50.0 mV
VO(STB) Bus Output Voltage, CANH, Standby mode STB = VIO, RL = open, See Figure 9-1 and Figure 9-2 –100 100 mV
VO(STB) Bus Output Voltage, CANL, Standby mode
STB = VIO, RL = open, See Figure 9-1 and Figure 9-2		 –100 100 mV
VOD(STB) Bus Output Voltage, CANH-CANL, Standby mode
STB=VIO, RL = open, See Figure 9-1 and Figure 9-2		 -200 200 mV
VSYM_DC Output symmetry (VISOIN - VO(CANH) - VO(CANL))  RL = 60 Ω and CL = open, TXD = VIO or GND1, See Figure 9-1 and Figure 9-2 –400.0 400.0 mV
IOS(SS_DOM) Short circuit current steady state output current, dominant  -15 V < CANH < 40 V, CANL = open, and TXD = 0 V, See Figure 9-8 –115.0 mA
-15 V < CANL < 40 V, CANH = open, and TXD = 0 V, See Figure 9-8 115.0 mA
IOS(SS_REC) Short circuit current steady state output current, recessive -27 V < VBUS < 32 V, VBUS = CANH = CANL, and TXD = VIO ,  See Figure 9-8 –5.0 5.0 mA
RECEIVER ELECTRICAL CHARACTERISTICS
VCM Input common mode range See Figure 9-4 and Table 9-1 –12 12 V
VIT Differential input threshold voltage, normal mode -12 V ≤ VCM ≤ 12 V, STB = GND1, See Figure 9-4 and Table 9-1 500.0 900.0 mV
VIT(STB) Differential input threshold voltage, standby mode -12 V ≤ VCM ≤ 12 V, STB = VIO 400 1150 mV
VHYS Hysteresis voltage for differential input threshold, normal mode -12 V ≤ VCM ≤ 12 V, STB = GND1 100 mV
VDIFF(DOM) Dominant state differential input voltage range, normal mode -12 V ≤ VCM ≤ 12 V, STB = GND1, See Figure 9-4 and Table 9-1 0.9 9 V
VDIFF(DOM) Dominant state differential input voltage range, standby mode -12 V ≤ VCM ≤ 12 V, STB = VIO, See Figure 9-4  and Table 9-1 1.15 9 V
VDIFF(REC) Recessive state differential input voltage range, normal mode -12 V ≤ VCM ≤ 12 V, STB = GND1, See Figure 9-4 and Table 9-1 –4 0.5 V
VDIFF(REC) Recessive state differential input voltage range, standby mode -12 V ≤ VCM ≤ 12 V, STB = VIO, See Figure 9-4  and Table 9-1 –4 0.4 V
IOFF(LKG) power-off bus input leakage current CANH = CANL = 5 V, VDD = VIO = GND1 5 uA
CI Input capacitance to ground (CANH or CANL) TXD = VIO 20 pF
CID Differential input capacitance TXD = VIO 10 pF
RID Differential input resistance TXD = VIO ; -12 V ≤ VCM ≤ +12 V 40 90 kΩ
RIN Input resistance (CANH or CANL) TXD = VIO ; -12 V ≤ VCM ≤ +12 V 20 45 kΩ
RIN(M) Input resistance matching: (1 - RIN(CANH)/RIN(CANL)) x 100% VCANH = VCANL = 5 V –1 1 %